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author | Jan Beulich <jbeulich@suse.com> | 2021-07-22 13:02:54 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2021-07-22 13:02:54 +0200 |
commit | 3fa77affb00ef5d9bcb7f080750625749cdfa611 (patch) | |
tree | 0dcf6e5eafa46b891e1380dc838ee8ae1a05a9e8 /opcodes | |
parent | be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8 (diff) | |
download | fsf-binutils-gdb-3fa77affb00ef5d9bcb7f080750625749cdfa611.zip fsf-binutils-gdb-3fa77affb00ef5d9bcb7f080750625749cdfa611.tar.gz fsf-binutils-gdb-3fa77affb00ef5d9bcb7f080750625749cdfa611.tar.bz2 |
x86-64: generalize OP_G()'s EVEX.R' handling
EVEX.R' is invalid to be clear not only for mask registers, but also for
GPRs - IOW everything handled in this function.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/i386-dis.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index ccc49ff..e95d2ef 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -11934,6 +11934,13 @@ OP_G (int bytemode, int sizeflag) { int add = 0; const char **names; + + if (vex.evex && !vex.r && address_mode == mode_64bit) + { + oappend ("(bad)"); + return; + } + USED_REX (REX_R); if (rex & REX_R) add += 8; @@ -12012,7 +12019,7 @@ OP_G (int bytemode, int sizeflag) break; case mask_bd_mode: case mask_mode: - if (add || (vex.evex && !vex.r)) + if (add) { oappend ("(bad)"); return; |