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authorNick Clifton <nickc@redhat.com>1998-05-26 23:53:12 +0000
committerNick Clifton <nickc@redhat.com>1998-05-26 23:53:12 +0000
commit3db24c6bc8b34017b46971870d2ceaa95ff803de (patch)
treeacbb3f90c10bcf47875dcfa432e27324d602193f /opcodes
parent42b5fd3608f891faf1bef1ecb4afbf37b7cd704d (diff)
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Fix PR15984 - Add flags to various opcodes
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/d30v-opc.c8
2 files changed, 9 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 2810aaa..74f61a1 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -2,6 +2,11 @@ Tue May 26 16:14:39 1998 Nick Clifton <nickc@cygnus.com>
* d30v-opc.c (d30v_format_table): Change definition of SHORT_B3
and SHORT_B3b formats to use Rb instead of Ra.
+
+ Add FLAG_MUL16 to MUL2XH opcode.
+
+ Add FLAG_ADDSUBppp to SRC and SATHp opcodes to implement extension
+ to existing 1.1.1 parallelisation prohibition procedure.
Fri May 22 16:00:00 1998 Doug Evans <devans@canuck.cygnus.com>
diff --git a/opcodes/d30v-opc.c b/opcodes/d30v-opc.c
index 9d27b13..ab6cc65 100644
--- a/opcodes/d30v-opc.c
+++ b/opcodes/d30v-opc.c
@@ -279,7 +279,7 @@ const struct d30v_opcode d30v_opcode_table[] = {
{ "mulhxhl", IALU2, 0x6, { SHORT_A }, IU, FLAG_MUL16, 0, 0 },
{ "mulhxhh", IALU2, 0x7, { SHORT_A }, IU, FLAG_MUL16, 0, 0 },
{ "mulx", IALU2, 0x18, { SHORT_AA }, IU, FLAG_MUL32, 0, 0 },
- { "mulx2h", IALU2, 0x1, { SHORT_A2 }, IU, FLAG_MUL32, 0, 0 },
+ { "mulx2h", IALU2, 0x1, { SHORT_A2 }, IU, FLAG_MUL32 | FLAG_MUL16, 0, 0 },
{ "mulxs", IALU2, 0x19, { SHORT_AA }, IU, FLAG_MUL32, 0, 0 },
{ "mvfacc", IALU2, 0x1f, { SHORT_RA }, IU, 0, 0, 0 },
{ "mvfsys", BRA, 0x1e, { SHORT_C1 }, MU, FLAG_ALL, FLAG_ALL, 0 },
@@ -298,15 +298,15 @@ const struct d30v_opcode d30v_opcode_table[] = {
{ "rtd", BRA, 0xa, { SHORT_NONE }, MU, 0, 0, 0 },
{ "sat", IALU2, 0x8, { SHORT_A5 }, IU, 0, 0, 0 },
{ "sat2h", IALU2, 0x9, { SHORT_A5 }, IU, 0, 0, 0 },
- { "sathl", IALU2, 0x1c, { SHORT_A5 }, IU, 0, 0, 0 },
- { "sathh", IALU2, 0x1d, { SHORT_A5 }, IU, 0, 0, 0 },
+ { "sathl", IALU2, 0x1c, { SHORT_A5 }, IU, FLAG_ADDSUBppp, 0, 0 },
+ { "sathh", IALU2, 0x1d, { SHORT_A5 }, IU, FLAG_ADDSUBppp, 0, 0 },
{ "satz", IALU2, 0xa, { SHORT_A5 }, IU, 0, 0, 0 },
{ "satz2h", IALU2, 0xb, { SHORT_A5 }, IU, 0, 0, 0 },
{ "sra", LOGIC, 0x10, { SHORT_A }, EITHER, 0, 0, 0 },
{ "sra2h", LOGIC, 0x11, { SHORT_A }, EITHER, 0, 0, 0 },
{ "srahh", LOGIC, 0x5, { SHORT_A }, EITHER, 0, 0, 0 },
{ "srahl", LOGIC, 0x4, { SHORT_A }, EITHER, 0, 0, 0 },
- { "src", LOGIC, 0x16, { SHORT_A }, EITHER, 0, 0, 0 },
+ { "src", LOGIC, 0x16, { SHORT_A }, EITHER, FLAG_ADDSUBppp, 0, 0 },
{ "srl", LOGIC, 0x12, { SHORT_A }, EITHER, 0, 0, 0 },
{ "srl2h", LOGIC, 0x13, { SHORT_A }, EITHER, 0, 0, 0 },
{ "srlhh", LOGIC, 0x7, { SHORT_A }, EITHER, 0, 0, 0 },