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| author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2014-10-09 13:16:53 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2014-10-09 13:16:53 +0100 |
| commit | 3d68f91c0fb05b426e554004cabd3ded4c91f9c8 (patch) | |
| tree | 0297b29c1d0d20a3d36868c0357e23a0db4f6efd /opcodes/sparc-dis.c | |
| parent | fcbdedf866d777b3598cf8703737eb0f987c2aca (diff) | |
| download | fsf-binutils-gdb-3d68f91c0fb05b426e554004cabd3ded4c91f9c8.zip fsf-binutils-gdb-3d68f91c0fb05b426e554004cabd3ded4c91f9c8.tar.gz fsf-binutils-gdb-3d68f91c0fb05b426e554004cabd3ded4c91f9c8.tar.bz2 | |
This is a series of patches that add support for the SPARC M7 cpu to
binutils. They were discussed and approved here:
https://sourceware.org/ml/binutils/2014-10/msg00038.html
Diffstat (limited to 'opcodes/sparc-dis.c')
| -rw-r--r-- | opcodes/sparc-dis.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c index db09c44..9f0b96e 100644 --- a/opcodes/sparc-dis.c +++ b/opcodes/sparc-dis.c @@ -106,7 +106,7 @@ static char *v9a_asr_reg_names[] = { "pcr", "pic", "dcr", "gsr", "set_softint", "clear_softint", "softint", "tick_cmpr", "stick", "stick_cmpr", "cfr", - "pause", "cps" + "pause", "mwait" }; /* Macros used to extract instruction fields. Not all fields have @@ -656,6 +656,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) break; case 'H': /* Double/even. */ case 'J': /* Quad/multiple of 4. */ + case '}': /* Double/even. */ fregx (X_RD (insn)); break; #undef freg @@ -793,6 +794,10 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) (*info->fprintf_func) (stream, "%%fprs"); break; + case '{': + (*info->fprintf_func) (stream, "%%mcdper"); + break; + case 'o': (*info->fprintf_func) (stream, "%%asi"); break; |