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| author | Peter Bergner <bergner@linux.ibm.com> | 2022-11-08 17:41:52 -0600 |
|---|---|---|
| committer | Peter Bergner <bergner@linux.ibm.com> | 2022-12-07 11:47:16 -0600 |
| commit | 51b52f4aded095af5722ecc5c0c5f4fde1bcf7aa (patch) | |
| tree | fa1ec7e3ed0505185e8aeba6cc78248dc01b91af /opcodes/ppc-opc.c | |
| parent | a60038c648d15fcb4bb91772433ea5e668cdf87d (diff) | |
| download | fsf-binutils-gdb-51b52f4aded095af5722ecc5c0c5f4fde1bcf7aa.zip fsf-binutils-gdb-51b52f4aded095af5722ecc5c0c5f4fde1bcf7aa.tar.gz fsf-binutils-gdb-51b52f4aded095af5722ecc5c0c5f4fde1bcf7aa.tar.bz2 | |
PowerPC: Add support for RFC02655 - Saturating Subtract Instruction
opcodes/
* ppc-opc.c (XOL): New define.
(XOL_MASK): Likewise.
(powerpc_opcodes): Add subfus, subfus., subwus, subwus., subdus, subdus.
gas/
* testsuite/gas/ppc/rfc02655.s: New test.
* testsuite/gas/ppc/rfc02655.d: Likewise
* testsuite/gas/ppc/future-raw.s: Likewise.
* testsuite/gas/ppc/future-raw.d: Likewise.
* testsuite/gas/ppc/ppc.exp: Run them.
Diffstat (limited to 'opcodes/ppc-opc.c')
| -rw-r--r-- | opcodes/ppc-opc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index e25f1d7..112c2c3 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -3704,6 +3704,8 @@ const struct powerpc_operand powerpc_operands[] = #define BO16 PSWM /* The pst field in a SVRM form instruction. */ #define pst PSWM + /* The L field in a XO form instruction. */ +#define XOL PSWM { 0x1, 10, 0, 0, 0 }, /* IDX bits for quantization in the pair singles instructions. */ @@ -4775,6 +4777,7 @@ const unsigned int num_powerpc_operands = ARRAY_SIZE (powerpc_operands); | ((((uint64_t)(oe)) & 1) << 10) \ | (((unsigned long)(rc)) & 1)) #define XO_MASK XO (0x3f, 0x1ff, 1, 1) +#define XOL_MASK XO (0x3f, 0x1ff, 0, 1) /* An XO_MASK with the RB field fixed. */ #define XORB_MASK (XO_MASK | RB_MASK) @@ -7212,6 +7215,12 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"td", X(31,68), X_MASK, PPC64, 0, {TO, RA, RB}}, {"lwfcmx", APU(31,71,0), APU_MASK, PPC405, 0, {FCRT, RA, RB}}, +{"subwus", XO(31,72,0,0), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subwus.", XO(31,72,0,1), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subdus", XO(31,72,1,0), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subdus.", XO(31,72,1,1), XO_MASK, FUTURE, EXT, {RT, RB, RA}}, +{"subfus", XO(31,72,0,0), XOL_MASK, FUTURE, 0, {RT, XOL, RA, RB}}, +{"subfus.", XO(31,72,0,1), XOL_MASK, FUTURE, 0, {RT, XOL, RA, RB}}, {"mulhd", XO(31,73,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}}, {"mulhd.", XO(31,73,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}}, |