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| author | Alan Modra <amodra@gmail.com> | 2020-08-11 17:20:04 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-08-11 22:06:40 +0930 |
| commit | 08770ec259afcc34c2400d5913003584334a412d (patch) | |
| tree | 09242675a9770ab1dfd66be4718c9afe7592868b /opcodes/ppc-opc.c | |
| parent | 1796a2a150f66c84da4275606e41e191d340b8fb (diff) | |
| download | fsf-binutils-gdb-08770ec259afcc34c2400d5913003584334a412d.zip fsf-binutils-gdb-08770ec259afcc34c2400d5913003584334a412d.tar.gz fsf-binutils-gdb-08770ec259afcc34c2400d5913003584334a412d.tar.bz2 | |
PowerPC CELL cctp*
* ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
Diffstat (limited to 'opcodes/ppc-opc.c')
| -rw-r--r-- | opcodes/ppc-opc.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index d62475e..75944e2 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -7127,6 +7127,12 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}}, +/* or 1,1,1 */ +{"cctpl", 0x7c210b78, 0xffffffff, CELL, 0, {0}}, +/* or 2,2,2 */ +{"cctpm", 0x7c421378, 0xffffffff, CELL, 0, {0}}, +/* or 3,3,3 */ +{"cctph", 0x7c631b78, 0xffffffff, CELL, 0, {0}}, /* or 26,26,26 */ {"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}}, /* or 27,27,27 */ @@ -7137,6 +7143,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}}, /* or 30,30,30 */ {"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}}, + {"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}}, {"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}}, {"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RSB}}, @@ -8025,10 +8032,6 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPC476, {RA0, RB}}, -{"cctpl", 0x7c210b78, 0xffffffff, CELL, 0, {0}}, -{"cctpm", 0x7c421378, 0xffffffff, CELL, 0, {0}}, -{"cctph", 0x7c631b78, 0xffffffff, CELL, 0, {0}}, - {"dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}}, {"dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}}, {"dssall", XDSS(31,822,1), XDSS_MASK, PPCVEC, 0, {0}}, |