Use consistent types for holding instructions, instruction masks, etc.

include/
	* opcode/ppc.h (PPC_INT_FMT): Define.
	(struct powerpc_opcode) <opcode>: Update type.
	(struct powerpc_opcode) <mask>: Likewise.
	(struct powerpc_opcode) <bitm>: Likewise.
	(struct powerpc_opcode) <insert>: Likewise.
	(struct powerpc_opcode) <extract>: Likewise.
	(ppc_optional_operand_value): Likewise.

gas/
	* config/tc-ppc.c (last_insn): Update type.
	(insn_validate) <omask, mask>: Likewise.
	(ppc_setup_opcodes) <mask, right_bit>: Likewise.
	<PRINT_OPCODE_TABLE>: Update types and printf format specifiers.
	(ppc_insert_operand): Update return and argument types and remove
	unneeded type casts.
	<min, max, right, tmp>: Update type.
	(md_assemble): Remove unneeded type casts.
	<insn, val, tmp_insn>: Update type.

opcodes/
	* opcodes/ppc-dis.c (disassemble_init_powerpc): Fix white space.
	(operand_value_powerpc): Update return and argument type.
	<value, top>: Update type.
	(skip_optional_operands): Update argument type.
	(lookup_powerpc): Likewise.
	(lookup_vle): Likewise.
	<table_opcd, table_mask, insn2>: Update type.
	(lookup_spe2): Update argument type.
	<table_opcd, table_mask, insn2>: Update type.
	(print_insn_powerpc) <insn, value>: Update type.
	Use PPC_INT_FMT for printing instructions and operands.
	* opcodes/ppc-opc.c (insert_arx, extract_arx, insert_ary, extract_ary,
	insert_rx, extract_rx, insert_ry, extract_ry, insert_bat, extract_bat,
	insert_bba, extract_bba, insert_bdm, extract_bdm, insert_bdp,
	extract_bdp, valid_bo_pre_v2, valid_bo_post_v2, valid_bo, insert_bo,
	extract_bo, insert_boe, extract_boe, insert_dcmxs, extract_dcmxs,
	insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_fxm,
	extract_fxm, insert_li20, extract_li20, insert_ls, extract_ls,
	insert_esync, extract_esync, insert_mbe, extract_mbe, insert_mb6,
	extract_mb6, extract_nb, insert_nbi, insert_nsi, extract_nsi,
	insert_ral, extract_ral, insert_ram, extract_ram, insert_raq,
	extract_raq, insert_ras, extract_ras, insert_rbs, extract_rbs,
	insert_rbx, extract_rbx, insert_sci8, extract_sci8, insert_sci8n,
	extract_sci8n, insert_sd4h, extract_sd4h, insert_sd4w, extract_sd4w,
	insert_oimm, extract_oimm, insert_sh6, extract_sh6, insert_spr,
	extract_spr, insert_sprg, extract_sprg, insert_tbr, extract_tbr,
	insert_xt6, extract_xt6, insert_xtq6, extract_xtq6, insert_xa6,
	extract_xa6, insert_xb6, extract_xb6, insert_xb6s, extract_xb6s,
	insert_xc6, extract_xc6, insert_dm, extract_dm, insert_vlesi,
	extract_vlesi, insert_vlensi, extract_vlensi, insert_vleui,
	extract_vleui, insert_vleil, extract_vleil, insert_evuimm1_ex0,
	extract_evuimm1_ex0, insert_evuimm2_ex0, extract_evuimm2_ex0,
	insert_evuimm4_ex0, extract_evuimm4_ex0, insert_evuimm8_ex0,
	extract_evuimm8_ex0, insert_evuimm_lt8, extract_evuimm_lt8,
	insert_evuimm_lt16, extract_evuimm_lt16, insert_rD_rS_even,
	extract_rD_rS_even, insert_off_lsp, extract_off_lsp, insert_off_spe2,
	extract_off_spe2, insert_Ddd, extract_Ddd): Update types.
	(OP, OPTO, OPL, OPVUP, OPVUPRT, A, AFRALFRC_MASK, B, BD8, BD8IO, BD15,
	BD24, BBO, Y_MASK  , AT1_MASK, AT2_MASK, BBOCB, C_LK, C, CTX, UCTX,
	DX, EVSEL, IA16, I16A, I16L, IM7, LI20, MME, MD, MDS, SC, SC_MASK,
	SCI8, SCI8BF, SD4, SE_IM5, SE_R, SE_RR, VX, VX_LSP, VX_RA_CONST,
	VX_RB_CONST, VX_SPE_CRFD, VX_SPE2_CLR, VX_SPE2_SPLATB, VX_SPE2_OCTET,
	VX_SPE2_DDHH, VX_SPE2_HH, VX_SPE2_EVMAR, VX_SPE2_EVMAR_MASK, VXA,
	VXR, VXASH, X, EX, XX2, XX3, XX3RC, XX4, Z, XWRA_MASK, XLRT_MASK,
	XRLARB_MASK, XLRAND_MASK, XRTLRA_MASK, XRTLRARB_MASK, XRTARARB_MASK,
	XRTBFRARB_MASK, XOPL, XOPL2, XRCL, XRT, XRTRA, XCMP_MASK, XCMPL_MASK,
	XTO, XTLB, XSYNC, XEH_MASK, XDSS, XFL, XISEL, XL, XLO, XLYLK, XLOCB,
	XMBAR, XO, XOPS, XS, XFXM, XSPR, XUC, XW, APU): Update types in casts.

1 files changed, 43 insertions, 47 deletions

diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 0e2e185..d5293d3 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -381,39 +381,36 @@ disassemble_init_powerpc (struct disassemble_info *info)
 
   if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
     {
-
       i = powerpc_num_opcodes;
       while (--i >= 0)
-        {
-          unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
-
-          powerpc_opcd_indices[op] = i;
-        }
+	{
+	  unsigned op = PPC_OP (powerpc_opcodes[i].opcode);
+	  powerpc_opcd_indices[op] = i;
+	}
 
       last = powerpc_num_opcodes;
       for (i = PPC_OPCD_SEGS; i > 0; --i)
-        {
-          if (powerpc_opcd_indices[i] == 0)
+	{
+	  if (powerpc_opcd_indices[i] == 0)
 	    powerpc_opcd_indices[i] = last;
-          last = powerpc_opcd_indices[i];
-        }
+	  last = powerpc_opcd_indices[i];
+	}
 
       i = vle_num_opcodes;
       while (--i >= 0)
-        {
-          unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
-          unsigned seg = VLE_OP_TO_SEG (op);
-
-          vle_opcd_indices[seg] = i;
-        }
+	{
+	  unsigned op = VLE_OP (vle_opcodes[i].opcode, vle_opcodes[i].mask);
+	  unsigned seg = VLE_OP_TO_SEG (op);
+	  vle_opcd_indices[seg] = i;
+	}
 
       last = vle_num_opcodes;
       for (i = VLE_OPCD_SEGS; i > 0; --i)
-        {
-          if (vle_opcd_indices[i] == 0)
+	{
+	  if (vle_opcd_indices[i] == 0)
 	    vle_opcd_indices[i] = last;
-          last = vle_opcd_indices[i];
-        }
+	  last = vle_opcd_indices[i];
+	}
     }
 
   /* SPE2 opcodes */
@@ -422,7 +419,6 @@ disassemble_init_powerpc (struct disassemble_info *info)
     {
       unsigned xop = SPE2_XOP (spe2_opcodes[i].opcode);
       unsigned seg = SPE2_XOP_TO_SEG (xop);
-
       spe2_opcd_indices[seg] = i;
     }
 
@@ -464,11 +460,11 @@ print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
 
 /* Extract the operand value from the PowerPC or POWER instruction.  */
 
-static long
+static int64_t
 operand_value_powerpc (const struct powerpc_operand *operand,
-		       unsigned long insn, ppc_cpu_t dialect)
+		       uint64_t insn, ppc_cpu_t dialect)
 {
-  long value;
+  int64_t value;
   int invalid;
   /* Extract the value from the instruction.  */
   if (operand->extract)
@@ -483,7 +479,7 @@ operand_value_powerpc (const struct powerpc_operand *operand,
 	{
 	  /* BITM is always some number of zeros followed by some
 	     number of ones, followed by some number of zeros.  */
-	  unsigned long top = operand->bitm;
+	  uint64_t top = operand->bitm;
 	  /* top & -top gives the rightmost 1 bit, so this
 	     fills in any trailing zeros.  */
 	  top |= (top & -top) - 1;
@@ -499,7 +495,7 @@ operand_value_powerpc (const struct powerpc_operand *operand,
 
 static int
 skip_optional_operands (const unsigned char *opindex,
-			unsigned long insn, ppc_cpu_t dialect)
+			uint64_t insn, ppc_cpu_t dialect)
 {
   const struct powerpc_operand *operand;
 
@@ -519,7 +515,7 @@ skip_optional_operands (const unsigned char *opindex,
 /* Find a match for INSN in the opcode table, given machine DIALECT.  */
 
 static const struct powerpc_opcode *
-lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
+lookup_powerpc (uint64_t insn, ppc_cpu_t dialect)
 {
   const struct powerpc_opcode *opcode, *opcode_end, *last;
   unsigned long op;
@@ -570,7 +566,7 @@ lookup_powerpc (unsigned long insn, ppc_cpu_t dialect)
 /* Find a match for INSN in the VLE opcode table.  */
 
 static const struct powerpc_opcode *
-lookup_vle (unsigned long insn)
+lookup_vle (uint64_t insn)
 {
   const struct powerpc_opcode *opcode;
   const struct powerpc_opcode *opcode_end;
@@ -590,10 +586,10 @@ lookup_vle (unsigned long insn)
        opcode < opcode_end;
        ++opcode)
     {
-      unsigned long table_opcd = opcode->opcode;
-      unsigned long table_mask = opcode->mask;
+      uint64_t table_opcd = opcode->opcode;
+      uint64_t table_mask = opcode->mask;
       bfd_boolean table_op_is_short = PPC_OP_SE_VLE(table_mask);
-      unsigned long insn2;
+      uint64_t insn2;
       const unsigned char *opindex;
       const struct powerpc_operand *operand;
       int invalid;
@@ -624,7 +620,7 @@ lookup_vle (unsigned long insn)
 /* Find a match for INSN in the SPE2 opcode table.  */
 
 static const struct powerpc_opcode *
-lookup_spe2 (unsigned long insn)
+lookup_spe2 (uint64_t insn)
 {
   const struct powerpc_opcode *opcode, *opcode_end;
   unsigned op, xop, seg;
@@ -645,9 +641,9 @@ lookup_spe2 (unsigned long insn)
        opcode < opcode_end;
        ++opcode)
     {
-      unsigned long table_opcd = opcode->opcode;
-      unsigned long table_mask = opcode->mask;
-      unsigned long insn2;
+      uint64_t table_opcd = opcode->opcode;
+      uint64_t table_mask = opcode->mask;
+      uint64_t insn2;
       const unsigned char *opindex;
       const struct powerpc_operand *operand;
       int invalid;
@@ -683,7 +679,7 @@ print_insn_powerpc (bfd_vma memaddr,
 {
   bfd_byte buffer[4];
   int status;
-  unsigned long insn;
+  uint64_t insn;
   const struct powerpc_opcode *opcode;
   bfd_boolean insn_is_short;
 
@@ -753,7 +749,7 @@ print_insn_powerpc (bfd_vma memaddr,
       skip_optional = -1;
       for (opindex = opcode->operands; *opindex != 0; opindex++)
 	{
-	  long value;
+	  int64_t value;
 
 	  operand = powerpc_operands + *opindex;
 
@@ -785,27 +781,27 @@ print_insn_powerpc (bfd_vma memaddr,
 	  /* Print the operand as directed by the flags.  */
 	  if ((operand->flags & PPC_OPERAND_GPR) != 0
 	      || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
-	    (*info->fprintf_func) (info->stream, "r%ld", value);
+	    (*info->fprintf_func) (info->stream, "r%" PPC_INT_FMT "d", value);
 	  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
-	    (*info->fprintf_func) (info->stream, "f%ld", value);
+	    (*info->fprintf_func) (info->stream, "f%" PPC_INT_FMT "d", value);
 	  else if ((operand->flags & PPC_OPERAND_VR) != 0)
-	    (*info->fprintf_func) (info->stream, "v%ld", value);
+	    (*info->fprintf_func) (info->stream, "v%" PPC_INT_FMT "d", value);
 	  else if ((operand->flags & PPC_OPERAND_VSR) != 0)
-	    (*info->fprintf_func) (info->stream, "vs%ld", value);
+	    (*info->fprintf_func) (info->stream, "vs%" PPC_INT_FMT "d", value);
 	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
 	    (*info->print_address_func) (memaddr + value, info);
 	  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
 	    (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
 	  else if ((operand->flags & PPC_OPERAND_FSL) != 0)
-	    (*info->fprintf_func) (info->stream, "fsl%ld", value);
+	    (*info->fprintf_func) (info->stream, "fsl%" PPC_INT_FMT "d", value);
 	  else if ((operand->flags & PPC_OPERAND_FCR) != 0)
-	    (*info->fprintf_func) (info->stream, "fcr%ld", value);
+	    (*info->fprintf_func) (info->stream, "fcr%" PPC_INT_FMT "d", value);
 	  else if ((operand->flags & PPC_OPERAND_UDI) != 0)
-	    (*info->fprintf_func) (info->stream, "%ld", value);
+	    (*info->fprintf_func) (info->stream, "%" PPC_INT_FMT "d", value);
 	  else if ((operand->flags & PPC_OPERAND_CR_REG) != 0
 		   && (((dialect & PPC_OPCODE_PPC) != 0)
 		       || ((dialect & PPC_OPCODE_VLE) != 0)))
-	    (*info->fprintf_func) (info->stream, "cr%ld", value);
+	    (*info->fprintf_func) (info->stream, "cr%" PPC_INT_FMT "d", value);
 	  else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
 		   && (((dialect & PPC_OPCODE_PPC) != 0)
 		       || ((dialect & PPC_OPCODE_VLE) != 0)))
@@ -821,7 +817,7 @@ print_insn_powerpc (bfd_vma memaddr,
 	      (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
 	    }
 	  else
-	    (*info->fprintf_func) (info->stream, "%d", (int) value);
+	    (*info->fprintf_func) (info->stream, "%" PPC_INT_FMT "d", value);
 
 	  if (need_paren)
 	    {
@@ -851,7 +847,7 @@ print_insn_powerpc (bfd_vma memaddr,
     }
 
   /* We could not find a match.  */
-  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
+  (*info->fprintf_func) (info->stream, ".long 0x%" PPC_INT_FMT "x", insn);
 
   return 4;
 }