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| author | Jan Beulich <jbeulich@suse.com> | 2024-01-19 10:16:00 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2024-01-19 10:16:00 +0100 |
| commit | 5190fa38286a5a6a664e21c04fde361b395d9f72 (patch) | |
| tree | fef495b8114f985499a6518fa38e146287d7776b /opcodes/i386-opc.tbl | |
| parent | 519d634396592c5698add4a327468e6e6920576e (diff) | |
| download | fsf-binutils-gdb-5190fa38286a5a6a664e21c04fde361b395d9f72.zip fsf-binutils-gdb-5190fa38286a5a6a664e21c04fde361b395d9f72.tar.gz fsf-binutils-gdb-5190fa38286a5a6a664e21c04fde361b395d9f72.tar.bz2 | |
x86: support APX forms of U{RD,WR}MSR
This was missed in 6177c84d5edc ("Support APX GPR32 with extend evex
prefix").
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index c3f6443..f2efc7c 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3482,11 +3482,13 @@ eretu, 0xf30f01ca, FRED, NoSuf, {} // USER_MSR instructions. urdmsr, 0xf20f38f8, USER_MSR, RegMem|NoSuf|NoRex64, { Reg64, Reg64 } -urdmsr, 0xf2f8/0, USER_MSR, Modrm|Vex128|VexMap7|VexW0|NoSuf, { Imm32, Reg64 } +urdmsr, 0xf2f8, USER_MSR&APX_F, RegMem|EVexMap4|VexW0|NoSuf, { Reg64, Reg64 } +urdmsr, 0xf2f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 } uwrmsr, 0xf30f38f8, USER_MSR, Modrm|NoSuf|NoRex64, { Reg64, Reg64 } +uwrmsr, 0xf3f8, USER_MSR&APX_F, Modrm||EVexMap4|VexW0|NoSuf, { Reg64, Reg64 } // Immediates want to be first; md_assemble() takes care of swapping operands // accordingly. -uwrmsr, 0xf3f8/0, USER_MSR, Modrm|Vex128|VexMap7|VexW0|NoSuf, { Imm32, Reg64 } +uwrmsr, 0xf3f8/0, APX_F(USER_MSR), Modrm|Vex128|VexMap7|EVex128|VexW0|NoSuf, { Imm32, Reg64 } // USER_MSR instructions end. |