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| author | Cui,Lili <lili.cui@intel.com> | 2020-10-15 10:45:08 +0800 |
|---|---|---|
| committer | Cui,Lili <lili.cui@intel.com> | 2020-10-16 11:37:09 +0800 |
| commit | 57392598795ca9a9bae18858bf66b5a62ba1b71f (patch) | |
| tree | 7a4925aee977039e6e849a11b5a6f22a45cdd329 /opcodes/i386-opc.h | |
| parent | 51a8a7c2e3cc0730831963651a55d23d1fae624d (diff) | |
| download | fsf-binutils-gdb-57392598795ca9a9bae18858bf66b5a62ba1b71f.zip fsf-binutils-gdb-57392598795ca9a9bae18858bf66b5a62ba1b71f.tar.gz fsf-binutils-gdb-57392598795ca9a9bae18858bf66b5a62ba1b71f.tar.bz2 | |
Enhancement for avx-vnni patch
1. Rename CpuVEX_PREFIX to PseudoVexPrefix and
move it from cpu_flags to opcode_modifiers.
2. Delete {vex2} invalid test.
3. Use VexW0 and VexVVVV in the AVX-VNNI instructions.
gas/
* config/tc-i386.c: Move Pseudo Prefix check to match_template.
* testsuite/gas/i386/avx-vnni-inval.l: New file.
* testsuite/gas/i386/avx-vnni-inval.s: Likewise.
* testsuite/gas/i386/avx-vnni.d: Delete invalid {vex2} test.
* testsuite/gas/i386/avx-vnni.s: Likewise.
* testsuite/gas/i386/i386.exp: Add AVX VNNI invalid tests.
* testsuite/gas/i386/x86-64-avx-vnni-inval.l: New file.
* testsuite/gas/i386/x86-64-avx-vnni-inval.s: Likewise.
* testsuite/gas/i386/x86-64-avx-vnni.d: Delete invalid {vex2} test.
* testsuite/gas/i386/x86-64-avx-vnni.s: Likewise.
opcodes/
* i386-opc.tbl: Rename CpuVEX_PREFIX to PseudoVexPrefix
and move it from cpu_flags to opcode_modifiers.
Use VexW0 and VexVVVV in the AVX-VNNI instructions.
* i386-gen.c: Likewise.
* i386-opc.h: Likewise.
* i386-opc.h: Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'opcodes/i386-opc.h')
| -rw-r--r-- | opcodes/i386-opc.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 2e90c58..ce2a1a5 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -214,8 +214,6 @@ enum CpuTDX, /* Intel AVX VNNI Instructions support required. */ CpuAVX_VNNI, - /* Intel AVX Instructions support via {vex} prefix required. */ - CpuVEX_PREFIX, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -387,7 +385,6 @@ typedef union i386_cpu_flags unsigned int cpuavx512_vp2intersect:1; unsigned int cputdx:1; unsigned int cpuavx_vnni:1; - unsigned int cpuvex_prefix:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; @@ -534,6 +531,8 @@ enum NoRex64, /* deprecated fp insn, gets a warning */ Ugh, + /* Intel AVX Instructions support via {vex} prefix */ + PseudoVexPrefix, /* insn has VEX prefix: 1: 128bit VEX prefix (or operand dependent). 2: 256bit VEX prefix. @@ -739,6 +738,7 @@ typedef struct i386_opcode_modifier unsigned int immext:1; unsigned int norex64:1; unsigned int ugh:1; + unsigned int pseudovexprefix:1; unsigned int vex:2; unsigned int vexvvvv:2; unsigned int vexw:2; |