diff options
| author | Jan Beulich <jbeulich@suse.com> | 2023-02-24 13:58:35 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-02-24 13:58:35 +0100 |
| commit | c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a (patch) | |
| tree | 0a8f85558ebcb713353cd74ef1d2224313c88d3e /opcodes/i386-gen.c | |
| parent | 5eeeafe0a6884eaf1c5a21160e78e53842fa7cba (diff) | |
| download | fsf-binutils-gdb-c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a.zip fsf-binutils-gdb-c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a.tar.gz fsf-binutils-gdb-c3bb24f5663f3e423f313bc16f27e32ef5e1dc0a.tar.bz2 | |
x86-64: don't permit LAHF/SAHF with "generic64"
The feature isn't universally available on 64-bit CPUs.
Note that in i386-gen.c:isa_dependencies[] I'm only adding it to models
where I'm certain the functionality exists. For Nocona and Core I'm
uncertain in particular.
Diffstat (limited to 'opcodes/i386-gen.c')
| -rw-r--r-- | opcodes/i386-gen.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 8b31ac8..945d52f 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -67,7 +67,7 @@ static const dependency isa_dependencies[] = { "CORE2", "NOCONA|SSSE3" }, { "COREI7", - "CORE2|SSE4_2|Rdtscp" }, + "CORE2|SSE4_2|Rdtscp|LAHF_SAHF" }, { "K6", "186|286|386|486|586|SYSCALL|387|MMX" }, { "K6_2", @@ -79,7 +79,7 @@ static const dependency isa_dependencies[] = { "AMDFAM10", "K8|FISTTP|SSE4A|ABM" }, { "BDVER1", - "GENERIC64|FISTTP|Rdtscp|CX16|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" }, + "GENERIC64|FISTTP|Rdtscp|CX16|LAHF_SAHF|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" }, { "BDVER2", "BDVER1|FMA|BMI|TBM|F16C" }, { "BDVER3", @@ -87,7 +87,7 @@ static const dependency isa_dependencies[] = { "BDVER4", "BDVER3|AVX2|Movbe|BMI2|RdRnd|MWAITX" }, { "ZNVER1", - "GENERIC64|FISTTP|Rdtscp|CX16|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" }, + "GENERIC64|FISTTP|Rdtscp|CX16|LAHF_SAHF|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" }, { "ZNVER2", "ZNVER1|CLWB|RDPID|RDPRU|MCOMMIT|WBNOINVD" }, { "ZNVER3", @@ -95,7 +95,7 @@ static const dependency isa_dependencies[] = { "ZNVER4", "ZNVER3|AVX512F|AVX512DQ|AVX512IFMA|AVX512CD|AVX512BW|AVX512VL|AVX512_BF16|AVX512VBMI|AVX512_VBMI2|AVX512_VNNI|AVX512_BITALG|AVX512_VPOPCNTDQ|GFNI|RMPQUERY" }, { "BTVER1", - "GENERIC64|FISTTP|CX16|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|CX16|Clflush|FISTTP|SVME" }, + "GENERIC64|FISTTP|CX16|LAHF_SAHF|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|Clflush|FISTTP|SVME" }, { "BTVER2", "BTVER1|AVX|BMI|F16C|AES|PCLMUL|Movbe|Xsaveopt|PRFCHW" }, { "286", @@ -313,6 +313,7 @@ static bitfield cpu_flags[] = BITFIELD (LM), BITFIELD (Movbe), BITFIELD (CX16), + BITFIELD (LAHF_SAHF), BITFIELD (EPT), BITFIELD (Rdtscp), BITFIELD (FSGSBase), |