[PATCH 1/2] Enable Intel AVX512_FP16 instructions

Intel AVX512 FP16 instructions use maps 3, 5 and 6. Maps 5 and 6 use 3 bits
in the EVEX.mmm field (0b101, 0b110). Map 5 is for instructions that were FP32
in map 1 (0Fxx). Map 6 is for instructions that were FP32 in map 2 (0F38xx).
There are some exceptions to this rule. Some things in map 1 (0Fxx) with imm8
operands predated our current conventions; those instructions moved to map 3.
FP32 things in map 3 (0F3Axx) found new opcodes in map3 for FP16 because map3
is very sparsely populated. Most of the FP16 instructions share opcodes and
prefix (EVEX.pp) bits with the related FP32 operations.

Intel AVX512 FP16 instructions has new displacements scaling rules, please refer
to the public software developer manual for detail information.

gas/

2021-08-05  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
            H.J. Lu  <hongjiu.lu@intel.com>
            Wei Xiao <wei3.xiao@intel.com>
            Lili Cui  <lili.cui@intel.com>

	* config/tc-i386.c (struct Broadcast_Operation): Adjust comment.
	(cpu_arch): Add .avx512_fp16.
	(cpu_noarch): Add noavx512_fp16.
	(pte): Add evexmap5 and evexmap6.
	(build_evex_prefix): Handle EVEXMAP5 and EVEXMAP6.
	(check_VecOperations): Handle {1to32}.
	(check_VecOperands): Handle CheckRegNumb.
	(check_word_reg): Handle Toqword.
	(i386_error): Add invalid_dest_and_src_register_set.
	(match_template): Handle invalid_dest_and_src_register_set.
	* doc/c-i386.texi: Document avx512_fp16, noavx512_fp16.

opcodes/

2021-08-05  Igor Tsimbalist  <igor.v.tsimbalist@intel.com>
            H.J. Lu  <hongjiu.lu@intel.com>
            Wei Xiao <wei3.xiao@intel.com>
            Lili Cui  <lili.cui@intel.com>

	* i386-dis.c (EXwScalarS): New.
	(EXxh): Ditto.
	(EXxhc): Ditto.
	(EXxmmqh): Ditto.
	(EXxmmqdh): Ditto.
	(EXEvexXwb): Ditto.
	(DistinctDest_Fixup): Ditto.
	(enum): Add xh_mode, evex_half_bcst_xmmqh_mode, evex_half_bcst_xmmqdh_mode
	and w_swap_mode.
	(enum): Add PREFIX_EVEX_0F3A08_W_0, PREFIX_EVEX_0F3A0A_W_0,
	PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27, PREFIX_EVEX_0F3A56,
	PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66, PREFIX_EVEX_0F3A67,
	PREFIX_EVEX_0F3AC2, PREFIX_EVEX_MAP5_10, PREFIX_EVEX_MAP5_11,
	PREFIX_EVEX_MAP5_1D, PREFIX_EVEX_MAP5_2A, PREFIX_EVEX_MAP5_2C,
	PREFIX_EVEX_MAP5_2D, PREFIX_EVEX_MAP5_2E, PREFIX_EVEX_MAP5_2F,
	PREFIX_EVEX_MAP5_51, PREFIX_EVEX_MAP5_58, PREFIX_EVEX_MAP5_59,
	PREFIX_EVEX_MAP5_5A_W_0, PREFIX_EVEX_MAP5_5A_W_1,
	PREFIX_EVEX_MAP5_5B_W_0, PREFIX_EVEX_MAP5_5B_W_1,
	PREFIX_EVEX_MAP5_5C, PREFIX_EVEX_MAP5_5D, PREFIX_EVEX_MAP5_5E,
	PREFIX_EVEX_MAP5_5F, PREFIX_EVEX_MAP5_78, PREFIX_EVEX_MAP5_79,
	PREFIX_EVEX_MAP5_7A, PREFIX_EVEX_MAP5_7B, PREFIX_EVEX_MAP5_7C,
	PREFIX_EVEX_MAP5_7D_W_0, PREFIX_EVEX_MAP6_13, PREFIX_EVEX_MAP6_56,
	PREFIX_EVEX_MAP6_57, PREFIX_EVEX_MAP6_D6, PREFIX_EVEX_MAP6_D7
	(enum): Add EVEX_MAP5 and EVEX_MAP6.
	(enum): Add EVEX_W_MAP5_5A, EVEX_W_MAP5_5B,
	EVEX_W_MAP5_78_P_0, EVEX_W_MAP5_78_P_2, EVEX_W_MAP5_79_P_0,
	EVEX_W_MAP5_79_P_2, EVEX_W_MAP5_7A_P_2, EVEX_W_MAP5_7A_P_3,
	EVEX_W_MAP5_7B_P_2, EVEX_W_MAP5_7C_P_0, EVEX_W_MAP5_7C_P_2,
	EVEX_W_MAP5_7D, EVEX_W_MAP6_13_P_0, EVEX_W_MAP6_13_P_2,
	(get_valid_dis386): Properly handle new instructions.
	(intel_operand_size): Handle new modes.
	(OP_E_memory): Ditto.
	(OP_EX): Ditto.
	* i386-dis-evex.h: Updated for AVX512_FP16.
	* i386-dis-evex-mod.h: Updated for AVX512_FP16.
	* i386-dis-evex-prefix.h: Updated for AVX512_FP16.
	* i386-dis-evex-reg.h : Updated for AVX512_FP16.
	* i386-dis-evex-w.h : Updated for AVX512_FP16.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_FP16_FLAGS,
	and CPU_ANY_AVX512_FP16_FLAGS. Update CPU_ANY_AVX512F_FLAGS
	and CPU_ANY_AVX512BW_FLAGS.
	(cpu_flags): Add CpuAVX512_FP16.
	(opcode_modifiers): Add DistinctDest.
	* i386-opc.h (enum): (AVX512_FP16): New.
	(i386_opcode_modifier): Add reqdistinctreg.
	(i386_cpu_flags): Add cpuavx512_fp16.
	(EVEXMAP5): Defined as a macro.
	(EVEXMAP6): Ditto.
	* i386-opc.tbl: Add Intel AVX512_FP16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Ditto.

1 files changed, 595 insertions, 13 deletions

diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 287c7a8..d79c78c 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -403,8 +403,8 @@ static const struct dis386 evex_table[][256] = {
     /* 60 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vpexpand%BW", { XM, EXbwUnit }, PREFIX_DATA },
-    { "vpcompress%BW",   { EXbwUnit, XM }, PREFIX_DATA },
+    { "vpexpand%BW",	{ XM, EXbwUnit }, PREFIX_DATA },
+    { "vpcompress%BW",	{ EXbwUnit, XM }, PREFIX_DATA },
     { "vpblendm%DQ",	{ XM, Vex, EXx }, PREFIX_DATA },
     { "vblendmp%XW",	{ XM, Vex, EXx }, PREFIX_DATA },
     { "vpblendm%BW",	{ XM, Vex, EXx }, PREFIX_DATA },
@@ -453,7 +453,7 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { "vperm%BW",	{ XM, Vex, EXx }, PREFIX_DATA },
     { Bad_Opcode },
-    { "vpshufbitqmb",  { MaskG, Vex, EXx }, PREFIX_DATA },
+    { "vpshufbitqmb",	{ MaskG, Vex, EXx }, PREFIX_DATA },
     /* 90 */
     { "vpgatherd%DQ",	{ XMGatherD, MVexVSIBDWpX }, PREFIX_DATA },
     { "vpgatherq%DQ",	{ XMGatherQ, MVexVSIBQWpX }, PREFIX_DATA },
@@ -518,11 +518,11 @@ static const struct dis386 evex_table[][256] = {
     { MOD_TABLE (MOD_EVEX_0F38C6) },
     { MOD_TABLE (MOD_EVEX_0F38C7) },
     /* C8 */
-    { "vexp2p%XW",        { XM, EXx, EXxEVexS }, PREFIX_DATA },
+    { "vexp2p%XW",	{ XM, EXx, EXxEVexS }, PREFIX_DATA },
     { Bad_Opcode },
-    { "vrcp28p%XW",       { XM, EXx, EXxEVexS }, PREFIX_DATA },
+    { "vrcp28p%XW",	{ XM, EXx, EXxEVexS }, PREFIX_DATA },
     { "vrcp28s%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
-    { "vrsqrt28p%XW",     { XM, EXx, EXxEVexS }, PREFIX_DATA },
+    { "vrsqrt28p%XW",	{ XM, EXx, EXxEVexS }, PREFIX_DATA },
     { "vrsqrt28s%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA },
     { Bad_Opcode },
     { VEX_W_TABLE (VEX_W_0F38CF) },
@@ -626,8 +626,8 @@ static const struct dis386 evex_table[][256] = {
     { EVEX_LEN_TABLE (EVEX_LEN_0F3A23) },
     { Bad_Opcode },
     { "vpternlog%DQ",	{ XM, Vex, EXx, Ib }, PREFIX_DATA },
-    { "vgetmantp%XW",	{ XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
-    { "vgetmants%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A26) },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A27) },
     /* 28 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -680,8 +680,8 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { "vfixupimmp%XW",	{ XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA },
     { "vfixupimms%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
-    { "vreducep%XW",	{ XM, EXx, EXxEVexS, Ib }, PREFIX_DATA },
-    { "vreduces%XW",	{ XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A56) },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A57) },
     /* 58 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -698,8 +698,8 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { "vfpclassp%XW%XZ",	{ MaskG, EXx, Ib }, PREFIX_DATA },
-    { "vfpclasss%XW",	{ MaskG, EXdq, Ib }, PREFIX_DATA },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A66) },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3A67) },
     /* 68 */
     { Bad_Opcode },
     { Bad_Opcode },
@@ -802,7 +802,7 @@ static const struct dis386 evex_table[][256] = {
     /* C0 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_0F3AC2) },
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
@@ -872,4 +872,586 @@ static const struct dis386 evex_table[][256] = {
     { Bad_Opcode },
     { Bad_Opcode },
   },
+  /* EVEX_MAP5_ */
+  {
+    /* 00 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 08 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 10 */
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_10) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_11) },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 18 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_1D) },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 20 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 28 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_2A) },
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_2C) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_2D) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_2E) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_2F) },
+    /* 30 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 38 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 40 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 48 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 50 */
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_51) },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 58 */
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_58) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_59) },
+    { VEX_W_TABLE (EVEX_W_MAP5_5A) },
+    { VEX_W_TABLE (EVEX_W_MAP5_5B) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5C) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5D) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5E) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_5F) },
+    /* 60 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 68 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vmovw", { XMScalar, Edw }, PREFIX_DATA },
+    { Bad_Opcode },
+    /* 70 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 78 */
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_78) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_79) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_7A) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_7B) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP5_7C) },
+    { VEX_W_TABLE (EVEX_W_MAP5_7D) },
+    { "vmovw",	  { Edw, XMScalar }, PREFIX_DATA },
+    { Bad_Opcode },
+    /* 80 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 88 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 90 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 98 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* A0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* A8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* B0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* B8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* C0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* C8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* D0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* D8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* E0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* E8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* F0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* F8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+  },
+  /* EVEX_MAP6_ */
+  {
+    /* 00 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 08 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 10 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP6_13) },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 18 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 20 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 28 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vscalefp%XH",      { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vscalefs%XH",      { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 30 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 38 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 40 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vgetexpp%XH",      { XM, EXxh, EXxEVexS }, PREFIX_DATA },
+    { "vgetexps%XH",      { XMM, VexScalar, EXw, EXxEVexS }, PREFIX_DATA },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 48 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vrcpp%XH",	  { XM, EXxh }, PREFIX_DATA },
+    { "vrcps%XH",	  { XMM, VexScalar, EXw }, PREFIX_DATA },
+    { "vrsqrtp%XH",       { XM, EXxh }, PREFIX_DATA },
+    { "vrsqrts%XH",       { XMM, VexScalar, EXw }, PREFIX_DATA },
+    /* 50 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP6_56) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP6_57) },
+    /* 58 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 60 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 68 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 70 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 78 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 80 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 88 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* 90 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vfmaddsub132p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmsubadd132p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    /* 98 */
+    { "vfmadd132p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmadd132s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub132p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub132s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    /* A0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vfmaddsub213p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmsubadd213p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    /* A8 */
+    { "vfmadd213p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmadd213s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub213p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub213s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    /* B0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vfmaddsub231p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmsubadd231p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    /* B8 */
+    { "vfmadd231p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmadd231s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub231p%XH",  { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfmsub231s%XH",  { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfnmadd231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
+    { "vfnmsub231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+    /* C0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* C8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* D0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP6_D6) },
+    { PREFIX_TABLE (PREFIX_EVEX_MAP6_D7) },
+    /* D8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* E0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* E8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* F0 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    /* F8 */
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+  },
 };