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| author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2024-06-25 11:30:24 +0100 |
|---|---|---|
| committer | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2024-06-25 13:38:48 +0100 |
| commit | f50b1a3c1f9514efdff6d808b2700eb18ab55630 (patch) | |
| tree | 2e56bf3b6c0291ba5507d7110f7e0e11774f1df0 /opcodes/aarch64-dis-2.c | |
| parent | f5f38efc0a20cb50105da4fd2f656cda4561ccc2 (diff) | |
| download | fsf-binutils-gdb-f50b1a3c1f9514efdff6d808b2700eb18ab55630.zip fsf-binutils-gdb-f50b1a3c1f9514efdff6d808b2700eb18ab55630.tar.gz fsf-binutils-gdb-f50b1a3c1f9514efdff6d808b2700eb18ab55630.tar.bz2 | |
aarch64: Fix sve2p1 extq instruction operands.
This patch fixes the syntax of sve2p1 "extq" instruction by modifying the operands
count to 4. A new operand AARCH64_OPND_SVE_UIMM4 is defined to handle the 4th
argument an 4-bit unsigned immediate of extq instruction. The instruction encoding
is updated to use constraint C_SCAN_MOVPRFX, to enable "extq" instruction to immediately
precede in program order by a MOVPRFX instruction. Also removed the unused operand
AARCH64_OPND_SVE_Zm_imm4.
This issues was reported here:
https://sourceware.org/pipermail/binutils/2024-February/132408.html
Diffstat (limited to 'opcodes/aarch64-dis-2.c')
| -rw-r--r-- | opcodes/aarch64-dis-2.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c index 4d1271d..0952728 100644 --- a/opcodes/aarch64-dis-2.c +++ b/opcodes/aarch64-dis-2.c @@ -34457,15 +34457,15 @@ aarch64_extract_operand (const aarch64_operand *self, case 194: case 195: case 196: - case 211: case 212: case 213: case 214: - case 223: + case 215: case 224: case 225: case 226: case 227: + case 228: case 239: case 243: case 248: @@ -34506,9 +34506,9 @@ aarch64_extract_operand (const aarch64_operand *self, case 40: case 41: case 42: - case 228: case 229: - case 232: + case 230: + case 233: case 269: case 270: case 285: @@ -34577,6 +34577,7 @@ aarch64_extract_operand (const aarch64_operand *self, case 208: case 209: case 210: + case 211: case 271: case 302: case 303: @@ -34736,19 +34737,18 @@ aarch64_extract_operand (const aarch64_operand *self, case 202: case 284: return aarch64_ext_sve_shrimm (self, info, code, inst, errors); - case 215: case 216: case 217: case 218: - return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors); case 219: + return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors); case 220: case 221: case 222: + case 223: return aarch64_ext_sme_za_vrs2 (self, info, code, inst, errors); - case 230: case 231: - case 233: + case 232: case 234: case 235: case 236: |