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| author | Andrew Carlotti <andrew.carlotti@arm.com> | 2025-01-06 18:06:51 +0000 |
|---|---|---|
| committer | Andrew Carlotti <andrew.carlotti@arm.com> | 2025-01-10 16:24:33 +0000 |
| commit | b5378decd21939b02610e07d9783fa11ab043b06 (patch) | |
| tree | aacdc56fd2da983c245226f3d729b835fc4f6689 /include/opcode | |
| parent | 9758466f4673a17caa2b45d678609108066bd56f (diff) | |
| download | fsf-binutils-gdb-b5378decd21939b02610e07d9783fa11ab043b06.zip fsf-binutils-gdb-b5378decd21939b02610e07d9783fa11ab043b06.tar.gz fsf-binutils-gdb-b5378decd21939b02610e07d9783fa11ab043b06.tar.bz2 | |
aarch64: Rename AARCH64_OPND_SME_ZT0_INDEX2_12
Rename to AARCH64_OPND_SME_ZT0_INDEX_MUL_VL.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/aarch64.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index d634d21..f697153 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -881,7 +881,7 @@ enum aarch64_opnd AARCH64_OPND_SME_VLxN_13, /* VLx2 or VLx4, in bit 13. */ AARCH64_OPND_SME_ZT0, /* The fixed token zt0/ZT0 (not encoded). */ AARCH64_OPND_SME_ZT0_INDEX, /* ZT0[<imm>], bits [14:12]. */ - AARCH64_OPND_SME_ZT0_INDEX2_12, /* ZT0[<imm>], bits [13:12]. */ + AARCH64_OPND_SME_ZT0_INDEX_MUL_VL,/* ZT0[<imm>], bits [13:12]. */ AARCH64_OPND_SME_ZT0_LIST, /* { zt0/ZT0 } (not encoded). */ AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */ AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */ |