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| author | Alice Carlotti <alice.carlotti@arm.com> | 2025-10-07 23:50:07 +0100 |
|---|---|---|
| committer | Alice Carlotti <alice.carlotti@arm.com> | 2025-10-10 01:33:14 +0100 |
| commit | 8a5fe4ee7199d1e70f161bd7afc2f7ccfecb5999 (patch) | |
| tree | 49363c18c159a29bfe84c4a753ad1d1182c7098b /include/opcode | |
| parent | 64aae286f69d2af855aeddc03113b13391eca058 (diff) | |
| download | fsf-binutils-gdb-8a5fe4ee7199d1e70f161bd7afc2f7ccfecb5999.tar.gz fsf-binutils-gdb-8a5fe4ee7199d1e70f161bd7afc2f7ccfecb5999.tar.bz2 fsf-binutils-gdb-8a5fe4ee7199d1e70f161bd7afc2f7ccfecb5999.zip | |
aarch64: Add support for FEAT_SSVE_FEXPA
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/aarch64.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index f3c6249afdb..5af991adb9b 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -253,6 +253,8 @@ enum aarch64_feature_bit { AARCH64_FEATURE_PoPS, /* GICv5 (Generic Interrupt Controller) CPU Interface Extension. */ AARCH64_FEATURE_GCIE, + /* SVE FEXPA instruction in streaming mode. */ + AARCH64_FEATURE_SSVE_FEXPA, /* SME TMOP instructions. */ AARCH64_FEATURE_SME_TMOP, /* SME MOP4 instructions. */ @@ -262,6 +264,8 @@ enum aarch64_feature_bit { by either of two (or more) sets of command line flags. */ /* +sve2 or +ssve-aes */ AARCH64_FEATURE_SVE2_SSVE_AES, + /* +sve or +ssve-fexpa */ + AARCH64_FEATURE_SVE_SSVE_FEXPA, /* +fp8fma+sve or +ssve-fp8fma */ AARCH64_FEATURE_FP8FMA_SVE, /* +fp8dot4+sve or +ssve-fp8dot4 */ |