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| author | Sudakshina Das <sudi.das@arm.com> | 2018-09-26 10:57:16 +0100 |
|---|---|---|
| committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-10-09 15:39:29 +0100 |
| commit | af4bcb4ce6939da1738c847a06789d2223b67ca4 (patch) | |
| tree | c97aeb157e74b8884981ab2852c2b3ec38e1756b /include/ChangeLog | |
| parent | 3fd229a447cd28a70bfd921f617bc6c3553b8fdd (diff) | |
| download | fsf-binutils-gdb-af4bcb4ce6939da1738c847a06789d2223b67ca4.zip fsf-binutils-gdb-af4bcb4ce6939da1738c847a06789d2223b67ca4.tar.gz fsf-binutils-gdb-af4bcb4ce6939da1738c847a06789d2223b67ca4.tar.bz2 | |
[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
The encodings can be found in the System Register XML.
This patch adds the following:
MSR Xn, RNDR
MSR Xn, RNDRRS
These are optional instructions in ARMv8.5-A and hence the new
+rng is added.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.c (aarch64_sys_regs): New entries for
rndr and rndrrs.
(aarch64_sys_reg_supported_p): New check for above.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): New "rng" option.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sysreg-4.s: Test both instructions.
* testsuite/gas/aarch64/sysreg-4.d: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
Diffstat (limited to 'include/ChangeLog')
| -rw-r--r-- | include/ChangeLog | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 499312d..ffd6592 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,9 @@ 2018-10-09 Sudakshina Das <sudi.das@arm.com> + * opcode/aarch64.h (AARCH64_FEATURE_RNG): New. + +2018-10-09 Sudakshina Das <sudi.das@arm.com> + * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New. 2018-10-09 Sudakshina Das <sudi.das@arm.com> |