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| author | Tom Tromey <tromey@adacore.com> | 2022-05-18 09:45:33 -0600 |
|---|---|---|
| committer | Tom Tromey <tromey@adacore.com> | 2022-06-02 09:04:45 -0600 |
| commit | cc55e4ef62f102c4aff3b34ee2a134cdcc734897 (patch) | |
| tree | 82f27b070048de97e41a80441e071c6b8eae6206 /gdb/ia64-tdep.c | |
| parent | 94e079e76e71951a97f74a61513a7b71adaa2a90 (diff) | |
| download | fsf-binutils-gdb-cc55e4ef62f102c4aff3b34ee2a134cdcc734897.zip fsf-binutils-gdb-cc55e4ef62f102c4aff3b34ee2a134cdcc734897.tar.gz fsf-binutils-gdb-cc55e4ef62f102c4aff3b34ee2a134cdcc734897.tar.bz2 | |
ODR warning for "struct instruction_type"
"struct instruction_type" is defined in multiple .c files, causing an
ODR warning. This patch renames the types.
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=22395
Diffstat (limited to 'gdb/ia64-tdep.c')
| -rw-r--r-- | gdb/ia64-tdep.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c index dd6d5b1..82456dc 100644 --- a/gdb/ia64-tdep.c +++ b/gdb/ia64-tdep.c @@ -75,7 +75,7 @@ static gdb::optional<gdb::byte_vector> ktab_buf; /* An enumeration of the different IA-64 instruction types. */ -enum instruction_type +enum ia64_instruction_type { A, /* Integer ALU ; I-unit or M-unit */ I, /* Non-ALU integer; I-unit */ @@ -470,7 +470,7 @@ replace_slotN_contents (gdb_byte *bundle, long long instr, int slotnum) replace_bit_field (bundle, instr, 5+41*slotnum, 41); } -static const enum instruction_type template_encoding_table[32][3] = +static const enum ia64_instruction_type template_encoding_table[32][3] = { { M, I, I }, /* 00 */ { M, I, I }, /* 01 */ @@ -510,7 +510,7 @@ static const enum instruction_type template_encoding_table[32][3] = address of the next instruction to fetch. */ static CORE_ADDR -fetch_instruction (CORE_ADDR addr, instruction_type *it, long long *instr) +fetch_instruction (CORE_ADDR addr, ia64_instruction_type *it, long long *instr) { gdb_byte bundle[BUNDLE_LEN]; int slotnum = (int) (addr & 0x0f) / SLOT_MULTIPLIER; @@ -1363,7 +1363,7 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, { CORE_ADDR next_pc; CORE_ADDR last_prologue_pc = pc; - instruction_type it; + ia64_instruction_type it; long long instr; int cfm_reg = 0; int ret_reg = 0; |