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| author | Maciej W. Rozycki <macro@orcam.me.uk> | 2021-05-29 03:26:32 +0200 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@orcam.me.uk> | 2021-05-29 03:26:32 +0200 |
| commit | b930964c425533f2344c6b26d4af17200bb42928 (patch) | |
| tree | 949f69c94cfa475f597e0cd80128fb7fe13f3f6b /gas | |
| parent | 21629cf8bc2b16d3c75dff0c3f1222b714bf90c2 (diff) | |
| download | fsf-binutils-gdb-b930964c425533f2344c6b26d4af17200bb42928.zip fsf-binutils-gdb-b930964c425533f2344c6b26d4af17200bb42928.tar.gz fsf-binutils-gdb-b930964c425533f2344c6b26d4af17200bb42928.tar.bz2 | |
MIPS/opcodes: Disassemble the RFE instruction
Fix a commit b015e599c772 ("[MIPS] Add new virtualization instructions"),
<https://sourceware.org/ml/binutils/2013-05/msg00118.html>, regression
and bring the disassembly of the RFE instruction back for the relevant
ISA levels.
It is because the "rfe" opcode table entry was incorrectly moved behind
the catch-all generic "c0" entry for CP0 instructions, causing output
like:
00: 42000010 c0 0x10
to be produced rather than:
00: 42000010 rfe
even for ISA levels that do include the RFE instruction.
Move the "rfe" entry ahead of "c0" then, correcting the problem. Add a
suitable test case.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Move the "rfe" entry ahead
of "c0".
gas/
* testsuite/gas/mips/rfe.d: New test.
* testsuite/gas/mips/rfe.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/rfe.d | 9 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/rfe.s | 8 |
4 files changed, 26 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 89a1acd..b4b6387 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * testsuite/gas/mips/rfe.d: New test. + * testsuite/gas/mips/rfe.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new test. + +2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * testsuite/gas/mips/cp1-names-r3900.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. * testsuite/gas/mips/branch-misc-3.d: Update disassembly diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index aebfe3d..65a74dd 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1338,6 +1338,9 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test_arches "cp0m" [mips_arch_list_matching mips1 \ !mips2 !micromips] + run_dump_test_arches "rfe" [mips_arch_list_matching mips1 \ + !mips3 !mips32 !micromips] + run_dump_test "cp1-names-numeric" run_dump_test "cp1-names-r3000" run_dump_test "cp1-names-r3900" diff --git a/gas/testsuite/gas/mips/rfe.d b/gas/testsuite/gas/mips/rfe.d new file mode 100644 index 0000000..c086e9d --- /dev/null +++ b/gas/testsuite/gas/mips/rfe.d @@ -0,0 +1,9 @@ +#objdump: -d --prefix-addresses --show-raw-insn +#name: MIPS RFE instruction +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 42000010 rfe + \.\.\. diff --git a/gas/testsuite/gas/mips/rfe.s b/gas/testsuite/gas/mips/rfe.s new file mode 100644 index 0000000..9094a57 --- /dev/null +++ b/gas/testsuite/gas/mips/rfe.s @@ -0,0 +1,8 @@ + .text + .set noreorder +foo: + rfe + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 |