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| author | Andreas Krebbel <krebbel@linux.ibm.com> | 2021-02-15 14:20:00 +0100 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@linux.ibm.com> | 2021-02-15 14:32:17 +0100 |
| commit | ba2b480f1037082d27da1afdfe0793c8aac9b1bd (patch) | |
| tree | 56d25b61192d23f03d7721c54b6ff7b2f31af1f8 /gas/doc/c-s390.texi | |
| parent | 8c6740616cd244e5763e974cb737affbe71db385 (diff) | |
| download | fsf-binutils-gdb-ba2b480f1037082d27da1afdfe0793c8aac9b1bd.zip fsf-binutils-gdb-ba2b480f1037082d27da1afdfe0793c8aac9b1bd.tar.gz fsf-binutils-gdb-ba2b480f1037082d27da1afdfe0793c8aac9b1bd.tar.bz2 | |
IBM Z: Implement instruction set extensions
opcodes/
* s390-mkopc.c (main): Accept arch14 as cpu string.
* s390-opc.txt: Add new arch14 instructions.
include/
* opcode/s390.h (enum s390_opcode_cpu_val): Add
S390_OPCODE_ARCH14.
gas/
* config/tc-s390.c (s390_parse_cpu): New entry for arch14.
* doc/c-s390.texi: Document arch14 march option.
* testsuite/gas/s390/s390.exp: Run the arch14 related tests.
* testsuite/gas/s390/zarch-arch14.d: New test.
* testsuite/gas/s390/zarch-arch14.s: New test.
Diffstat (limited to 'gas/doc/c-s390.texi')
| -rw-r--r-- | gas/doc/c-s390.texi | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi index 02881c3..1d86f09 100644 --- a/gas/doc/c-s390.texi +++ b/gas/doc/c-s390.texi @@ -18,7 +18,7 @@ and eleven chip levels. The architecture modes are the Enterprise System Architecture (ESA) and the newer z/Architecture mode. The chip levels are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec (or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13 -(or arch11), z14 (or arch12), and z15 (or arch13). +(or arch11), z14 (or arch12), z15 (or arch13), or arch14. @menu * s390 Options:: Command-line Options. @@ -70,8 +70,9 @@ are recognized: @code{z196} (or @code{arch9}), @code{zEC12} (or @code{arch10}), @code{z13} (or @code{arch11}), -@code{z14} (or @code{arch12}), and -@code{z15} (or @code{arch13}). +@code{z14} (or @code{arch12}), +@code{z15} (or @code{arch13}), and +@code{arch14}. Assembling an instruction that is not supported on the target processor results in an error message. |