Fix spelling mistakes and typos in the GAS sources.

	PR gas/21072
	* asintl.h: Fix spelling mistakes and typos.
	* atof-generic.c: Likewise.
	* bit_fix.h: Likewise.
	* config/atof-ieee.c: Likewise.
	* config/bfin-defs.h: Likewise.
	* config/bfin-parse.y: Likewise.
	* config/obj-coff-seh.h: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-evax.c: Likewise.
	* config/obj-macho.c: Likewise.
	* config/rx-parse.y: Likewise.
	* config/tc-aarch64.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-avr.c: Likewise.
	* config/tc-bfin.c: Likewise.
	* config/tc-cr16.c: Likewise.
	* config/tc-cris.c: Likewise.
	* config/tc-crx.c: Likewise.
	* config/tc-d10v.c: Likewise.
	* config/tc-d30v.c: Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-epiphany.c: Likewise.
	* config/tc-frv.c: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386-intel.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68hc11.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-mcore.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-mep.h: Likewise.
	* config/tc-metag.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-msp430.c: Likewise.
	* config/tc-msp430.h: Likewise.
	* config/tc-nds32.c: Likewise.
	* config/tc-nds32.h: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-nios2.h: Likewise.
	* config/tc-ns32k.c: Likewise.
	* config/tc-pdp11.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-pru.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sh.c: Likewise.
	* config/tc-sh64.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-vax.c: Likewise.
	* config/tc-visium.c: Likewise.
	* config/tc-xgate.c: Likewise.
	* config/tc-xtensa.c: Likewise.
	* config/tc-z80.c: Likewise.
	* config/tc-z8k.c: Likewise.
	* config/te-vms.c: Likewise.
	* config/xtensa-relax.c: Likewise.
	* doc/as.texinfo: Likewise.
	* doc/c-arm.texi: Likewise.
	* doc/c-hppa.texi: Likewise.
	* doc/c-i370.texi: Likewise.
	* doc/c-i386.texi: Likewise.
	* doc/c-m32r.texi: Likewise.
	* doc/c-m68k.texi: Likewise.
	* doc/c-mmix.texi: Likewise.
	* doc/c-msp430.texi: Likewise.
	* doc/c-nds32.texi: Likewise.
	* doc/c-ns32k.texi: Likewise.
	* doc/c-riscv.texi: Likewise.
	* doc/c-rx.texi: Likewise.
	* doc/c-s390.texi: Likewise.
	* doc/c-tic6x.texi: Likewise.
	* doc/c-tilegx.texi: Likewise.
	* doc/c-tilepro.texi: Likewise.
	* doc/c-v850.texi: Likewise.
	* doc/c-xgate.texi: Likewise.
	* doc/c-xtensa.texi: Likewise.
	* dwarf2dbg.c: Likewise.
	* ecoff.c: Likewise.
	* itbl-ops.c: Likewise.
	* listing.c: Likewise.
	* macro.c: Likewise.
	* po/gas.pot: Likewise.
	* read.c: Likewise.
	* struc-symbol.h: Likewise.
	* symbols.h: Likewise.
	* testsuite/gas/arc/relocs-errors.err: Likewise.
	* write.c: Likewise.

1 files changed, 5 insertions, 5 deletions

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 1487e73..02a4e22 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -5031,7 +5031,7 @@ match_int_operand (struct mips_arg_info *arg,
 	return FALSE;
 
       if (offset_reloc[0] != BFD_RELOC_UNUSED)
-	/* Relocation operators were used.  Accept the arguent and
+	/* Relocation operators were used.  Accept the argument and
 	   leave the relocation value in offset_expr and offset_relocs
 	   for the caller to process.  */
 	return TRUE;
@@ -8608,7 +8608,7 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
     {
       /* Search until we get a match for NAME.  It is assumed here that
 	 macros will never generate MDMX, MIPS-3D, or MT instructions.
-	 We try to match an instruction that fulfils the branch delay
+	 We try to match an instruction that fulfills the branch delay
 	 slot instruction length requirement (if any) of the previous
 	 instruction.  While doing this we record the first instruction
 	 seen that matches all the other conditions and use it anyway
@@ -9514,7 +9514,7 @@ move_register (int dest, int source)
    LOCAL is the sum of a symbol and a 16-bit or 32-bit displacement.
    The two alternatives are:
 
-   Global symbol		Local sybmol
+   Global symbol		Local symbol
    -------------		------------
    lw DEST,%got(SYMBOL)		lw DEST,%got(SYMBOL + OFFSET)
    ...				...
@@ -17618,11 +17618,11 @@ mips_fix_adjustable (fixS *fixp)
      is then identified by the section offset rather than by the symbol.
 
      However, if we're generating REL LO16 relocations, the offset is split
-     between the LO16 and parterning high part relocation.  The linker will
+     between the LO16 and partnering high part relocation.  The linker will
      need to recalculate the complete offset in order to correctly identify
      the merge data.
 
-     The linker has traditionally not looked for the parterning high part
+     The linker has traditionally not looked for the partnering high part
      relocation, and has thus allowed orphaned R_MIPS_LO16 relocations to be
      placed anywhere.  Rather than break backwards compatibility by changing
      this, it seems better not to force the issue, and instead keep the