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author | Richard Sandiford <rdsandiford@googlemail.com> | 2003-06-10 07:27:56 +0000 |
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committer | Richard Sandiford <rdsandiford@googlemail.com> | 2003-06-10 07:27:56 +0000 |
commit | 0613284fd49388e6d5938e76e471362485c6c93e (patch) | |
tree | 701fe75ed8d9bad2d580b3ca9eff768f97a5ffa8 /gas/config/tc-h8300.c | |
parent | 28d7dee9f8d1335bac2a2c51ea152d4d3db46823 (diff) | |
download | fsf-binutils-gdb-0613284fd49388e6d5938e76e471362485c6c93e.zip fsf-binutils-gdb-0613284fd49388e6d5938e76e471362485c6c93e.tar.gz fsf-binutils-gdb-0613284fd49388e6d5938e76e471362485c6c93e.tar.bz2 |
opcodes/
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
rts/l and rte/l register lists.
gas/
* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
lists. Allow single-register ranges.
testsuite/
* gas/h8300/h8sx_rtsl.[sd]: New test.
* gas/h8300/h8300.exp: Run it.
Diffstat (limited to 'gas/config/tc-h8300.c')
-rw-r--r-- | gas/config/tc-h8300.c | 23 |
1 files changed, 9 insertions, 14 deletions
diff --git a/gas/config/tc-h8300.c b/gas/config/tc-h8300.c index 6e6a170..6a6e3a8 100644 --- a/gas/config/tc-h8300.c +++ b/gas/config/tc-h8300.c @@ -1091,29 +1091,19 @@ get_rtsl_operands (char *ptr, struct h8_op *operand) as_bad (_("expected register")); return; } - if (type == 1) + ptr += len; + if (*ptr == '-') { - ptr += len; - if (*ptr++ != '-') - { - as_bad (_("expected register list")); - return; - } - len = parse_reg (ptr, &mode, &num2, SRC); + len = parse_reg (++ptr, &mode, &num2, SRC); if (len == 0 || (mode & MODE) != REG) { as_bad (_("expected register")); return; } ptr += len; - if (*ptr++ != ')') - { - as_bad (_("expected closing paren")); - return; - } /* CONST_xxx are used as placeholders in the opcode table. */ num = num2 - num; - if (num < 1 || num > 3) + if (num < 0 || num > 3) { as_bad (_("invalid register list")); return; @@ -1121,6 +1111,11 @@ get_rtsl_operands (char *ptr, struct h8_op *operand) } else num2 = num, num = 0; + if (type == 1 && *ptr++ != ')') + { + as_bad (_("expected closing paren")); + return; + } operand[0].mode = RS32; operand[1].mode = RD32; operand[0].reg = num; |