Bump Rocketchip to June 2020

Align DTB to 8-byte boundary

OpenSBI currently expects the source FDT to be XLEN-aligned when
relocating a copy for the next-stage bootloader or payload, which may
also have similar restrictions.

The devicetree specification advises that the DTB as a whole should be
aligned in memory to the largest alignment of any subblock (8 bytes).

Add constructor and parser for a dramsim ini directory from the cmd line

Dromajo + TraceIO Cleanup

Dromajo Simulation Bridge

model currently only supports read operations.

Rc 1.3 bump

* Intermediate RC Bump

* Fixes for RC bump. Generator is not feature complete

* Update traceIO reset

* Remove self-type alias in TraceIO