in firesim/firesim#764 MIDAS-level simulation has been timing out.  This
is being caused by uninitialized value of clock_hz.  In general all
non-static data members should be given default member initializers
to guard against cases like this where several of the constructor
signatures of mm_dramsim2_t fail to initialize clock_hz.

Co-authored-by: Tim Snyder <snyder.tim@gmail.com>

Fix clock domain/device name of periphery scratchpad

Add TLROM which sits alongside the external serial memory

Test chip features

Add config fragment to control initialization of tiles in reset

AXI Memory Over TL Serial Link

Add support for adding AsyncQueues when sending serial off-chip

Harness-side adapter and on-chip serdesser may not receive the same clock/reset, so need AsyncQueues on both sides.
Also avoid clocking the harness-side SerialAdapter with the serial clock. Clock the adapter faster, and use an AsyncQueue.

Add ClockDividerAndMux util module

Fix TileResetCtrl to use async reset