Generalize CanHaveTraceIOModuleImp to mix in with LazyRawModuleImp

remove cloneType

Move ROM base to 0x10040

update for latest chisel, remove toBool and chisel3.core.

Report failing mmap in mm_t

in firesim/firesim#764 MIDAS-level simulation has been timing out.  This
is being caused by uninitialized value of clock_hz.  In general all
non-static data members should be given default member initializers
to guard against cases like this where several of the constructor
signatures of mm_dramsim2_t fail to initialize clock_hz.

Co-authored-by: Tim Snyder <snyder.tim@gmail.com>

Fix clock domain/device name of periphery scratchpad

Add TLROM which sits alongside the external serial memory

Test chip features

Add config fragment to control initialization of tiles in reset

AXI Memory Over TL Serial Link

Add support for adding AsyncQueues when sending serial off-chip