Commits · add-ci · github.com / ucb-bar / testchipip

Dec 30, 2020
- Reduce heap size · 3a949dfb
  abejgonzalez authored Dec 29, 2020
  
  3a949dfb
- Add quotes to make invocation · 321e9788
  abejgonzalez authored Dec 29, 2020
  
  321e9788
- Bump cache | Add verilator to it · 6d65a337
  abejgonzalez authored Dec 29, 2020
  
  6d65a337
- Do not use build server · 5df9cf9a
  abejgonzalez authored Dec 29, 2020
  
  5df9cf9a
Dec 29, 2020
- Fix indentation · 07053988
  abejgonzalez authored Dec 28, 2020
  
  07053988
- Build toolchain · 85b7c1ba
  abejgonzalez authored Dec 28, 2020
  
  85b7c1ba
- Fix mapping not having a space · a323ff86
  abejgonzalez authored Dec 28, 2020
  
  a323ff86
- Exclude .git from copies | Don't copy non-existant folder · fbda29d5
  abejgonzalez authored Dec 28, 2020
  
  fbda29d5
- Add extra SSH key · 570c7fcc
  abejgonzalez authored Dec 28, 2020
  
  570c7fcc
- First attempt at adding CI · 7d9e905b
  abejgonzalez authored Dec 28, 2020
  
  7d9e905b
Dec 24, 2020
- Merge pull request #109 from ingallsj/warn-addResource · d661b6cd
  Jerry Zhao authored Dec 23, 2020
```
Chisel deprecated: setResource -> addResource
```
  d661b6cd
- Merge pull request #111 from sifive/tile_reset_domain · b91afaeb
  Tim Snyder authored Dec 23, 2020
```
Teach TLTileResetCtrl about TileResetDomain
```
  b91afaeb
Dec 23, 2020
- Merge pull request #112 from ucb-bar/no_supervisor_bootrom · 823cb1e7
  Jerry Zhao authored Dec 23, 2020
```
Bootrom support for systems with no S-mode (no MIDELEG)
```
  823cb1e7
- Bootrom support for systems with no S-mode (no MIDELEG) · 00103634
  Jerry Zhao authored Dec 22, 2020
  
  00103634
Dec 16, 2020
- Teach TLTileResetCtrl about TileResetDomain · ca67a843
  Tim Snyder authored Dec 16, 2020
  
  ca67a843
Dec 15, 2020
- Chisel deprecated: setResource -> addResource · 03691f65
  John Ingalls authored Dec 14, 2020
  
  03691f65
Dec 14, 2020
- Merge pull request #108 from ingallsj/warn-chisel · 60d5da8d
  Abraham Gonzalez authored Dec 13, 2020
```
fix Scala Chisel compile deprecation warnings
```
  60d5da8d
- Merge pull request #107 from ucb-bar/chisel34-bump · 275925ca
  Abraham Gonzalez authored Dec 13, 2020
```
Cleanup build.sbt | Bump versions
```
  275925ca
Dec 11, 2020
- fix Scala Chisel compile deprecation warnings · 5c43eb5c
  John Ingalls authored Dec 10, 2020
  
  5c43eb5c
Dec 01, 2020
- Cleanup build.sbt | Bump versions · 6fbb1b77
  abejgonzalez authored Nov 30, 2020
  
  6fbb1b77
Oct 19, 2020
- Merge pull request #106 from ucb-bar/diplomatic-clocks-mbus-crossing · 4166ea04
  David Biancolin authored Oct 19, 2020
```
Add Support for MBUS crossings
```
  4166ea04
Oct 15, 2020
- Merge remote-tracking branch 'origin/master' into diplomatic-clocks-mbus-crossing · 03af7aa5
  David Biancolin authored Oct 14, 2020
  
  03af7aa5
Oct 14, 2020
- [serial] Use a sync crossing by default; configure via config frag · 51240a9a
  David Biancolin authored Oct 14, 2020
  
  51240a9a
Oct 13, 2020
- Merge pull request #104 from ucb-bar/unify-fesvr · e88a2869
  Jerry Zhao authored Oct 12, 2020
```
Provide a custom tsi_t implementation with loadmem support
```
  e88a2869
Oct 10, 2020
- Rename testchip_fesvr to testchip_tsi · 56bfaa3f
  Jerry Zhao authored Oct 09, 2020
  
  56bfaa3f
- Package a custom tsi_t with loadmem support · 443f172f
  Jerry Zhao authored Oct 02, 2020
  
  443f172f
Oct 09, 2020
- [Serial] Break assumption that client domain == manager domain · b3987a3a
  David Biancolin authored Oct 09, 2020
  
  b3987a3a
- Add a form of ClockedIO with reset · 67865d75
  David Biancolin authored Sep 29, 2020
  
  67865d75
- Merge pull request #100 from ucb-bar/tile-reset-ctrl · bfed4feb
  Jerry Zhao authored Oct 08, 2020
```
Add tile-reset control registers
```
  bfed4feb
Oct 02, 2020
- Remove bootrom dumps · b3aa1bea
  Jerry Zhao authored Oct 01, 2020
  
  b3aa1bea
Oct 01, 2020
- Byte-pack the control registers · 89b528de
  Jerry Zhao authored Sep 30, 2020
  
  89b528de
- Add tile-reset control registers · 58e9347d
  Jerry Zhao authored Sep 21, 2020
  
  58e9347d
- Merge pull request #102 from ucb-bar/pbus-tl-mem · 10351d36
  Jerry Zhao authored Sep 30, 2020
```
Add config to hang the serial TL mem off the PBus for the no-L2 case.
```
  10351d36
Sep 27, 2020
- Merge pull request #101 from ucb-bar/bootrom-dump · 47f28564
  Jerry Zhao authored Sep 26, 2020
```
Makefile should generate bootrom objdump by default
```
  47f28564
Sep 26, 2020
- Add config to hang the serial TL mem off the PBus for the no-L2 case. · bd0ff2d0
  Jerry Zhao authored Sep 25, 2020
  
  bd0ff2d0
Sep 25, 2020
- Makefile should generate bootrom objdump by default · 28b44293
  Jerry Zhao authored Sep 24, 2020
  
  28b44293
Sep 19, 2020
- Merge pull request #98 from ucb-bar/serial-tl · 538017e3
  Jerry Zhao authored Sep 18, 2020
```
Add support for tilelink-over-serial
```
  538017e3
Sep 18, 2020
- Remove TLBuffer unnecessary argument · bdca33ec
  Jerry Zhao authored Sep 17, 2020
  
  bdca33ec
Sep 17, 2020
- Avoid conflict between lbwif-mini-ram and AXI4 MMIO ram · f2efec8e
  Jerry Zhao authored Sep 16, 2020
  
  f2efec8e
- Address review comments · 57cac41f
  Jerry Zhao authored Sep 16, 2020
  
  57cac41f