Commits · RC-1.3-bump · github.com / ucb-bar / testchipip

May 13, 2020
- allow different buffer parameters to be set again · 5b3f2c96
  Howard Mao authored May 13, 2020
  
  5b3f2c96
May 06, 2020
- Fix UARTAdapter IO after sifive-blocks update · 8fbd4f43
  Colin Schmidt authored May 05, 2020
  
  8fbd4f43
- Update to rocket-chip with firrtl and chisel 1.3 · b1271e07
  Colin Schmidt authored May 05, 2020
  
  b1271e07
Apr 25, 2020
- separate ClockUtilTests from rest of UnitTests · cec2c0b6
  Howard Mao authored Apr 24, 2020
  
  cec2c0b6
Apr 23, 2020
- fixes for ClockUtil blackboxes · ba705408
  Howard Mao authored Apr 22, 2020
  
  ba705408
- delete TestHarness · d45b91a9
  Howard Mao authored Apr 22, 2020
  
  d45b91a9
- delete Generator object · 3a758d4d
  Howard Mao authored Apr 22, 2020
  
  3a758d4d
Apr 18, 2020

Stage Phase Rocket Chip Bump (#76) · b8d6f210

David Biancolin authored Apr 17, 2020

* Intermediate RC Bump

* Fixes for RC bump. Generator is not feature complete

* Update traceIO reset

* Remove self-type alias in TraceIO

b8d6f210

Mar 29, 2020
- Merge pull request #74 from ucb-bar/master · d06d7c7d
  John Wright authored Mar 28, 2020
```
Unbreak dev (merge master back in)
```
  d06d7c7d
Mar 28, 2020

Modularize connect methods (#69) · 2797a6c1

John Wright authored Mar 27, 2020

* * Separate connect methods of BlockDevice, SerialAdapter, and UARTAdapter into objects for modularity
* Fix deprecation warnings

* SerialIO should not be an Option

* Add suggestName for uart_sim

* CR feedback; Move the option logic into SerialAdapter methods

2797a6c1

Mar 26, 2020
- Merge pull request #70 from ucb-bar/multiclock-trace-changtes · 30d44252
  David Biancolin authored Mar 25, 2020
```
TraceIO Changes for Multiclock Support in FireSim
```
  30d44252
Mar 18, 2020
- [TraceIO] Modify interface to provide clock and reset per-tile · 582f17da
  David Biancolin authored Mar 17, 2020
  
  582f17da
Mar 15, 2020
- Merge pull request #68 from ucb-bar/dev · 3a83cd0a
  alonamid authored Mar 14, 2020
```
Dev->Master for Chipyard 1.2.0
```
  3a83cd0a
Mar 06, 2020
- system_bus_ring variable can be public · 535eb6c5
  Howard Mao authored Mar 05, 2020
  
  535eb6c5
- Merge branch 'dev' into sbus-ring · 52720ed1
  Howard Mao authored Mar 05, 2020
  
  52720ed1
- more descriptive require message for Ring input map checking · ae2f2fad
  Howard Mao authored Mar 05, 2020
  
  ae2f2fad
Mar 03, 2020
- don't need to include dramsim2_ini files in blackbox resources · f1b41df8
  Howard Mao authored Mar 02, 2020
  
  f1b41df8
- make sure SimDRAM memory channel init can work in both VCS and Verilator · 830e9679
  Howard Mao authored Mar 02, 2020
  
  830e9679
- add doc comment · 8af0e174
  Howard Mao authored Mar 02, 2020
  
  8af0e174
- ring network takes input/output maps instead of randomization · b9b614ec
  Howard Mao authored Mar 02, 2020
  
  b9b614ec
Feb 28, 2020
- get rid of unnecessary imports · c8624886
  Howard Mao authored Feb 27, 2020
  
  c8624886
- Merge branch 'dev' into sbus-ring · e0dc9c2e
  Howard Mao authored Feb 27, 2020
  
  e0dc9c2e
- get rid of Mesh network · a4236a97
  Howard Mao authored Feb 27, 2020
  
  a4236a97
Feb 27, 2020
- add DRAMSim2 memory model · 3e41f4b7
  Howard Mao authored Feb 26, 2020
  
  3e41f4b7
Feb 26, 2020
- add SimDRAM black box model · 19457d4b
  Howard Mao authored Feb 11, 2020
  
  19457d4b
- Merge pull request #65 from ucb-bar/generator_unification · 4982073d
  Jerry Zhao authored Feb 25, 2020
```
Modifications for Chipyard generator unification
```
  4982073d
Feb 21, 2020
- allow Ring topology to be partially randomized · f3a9675f
  Howard Mao authored Feb 20, 2020
  
  f3a9675f
Feb 12, 2020
- Add CanHaveTraceIO trait · a3da53e8
  Jerry Zhao authored Feb 11, 2020
  
  a3da53e8
Feb 08, 2020
- Remove need for trait for UARTAdapter · ff1daef0
  Jerry Zhao authored Feb 07, 2020
  
  ff1daef0
Feb 07, 2020
- Modifications for Chipyard generator unification · 2018d78d
  Jerry Zhao authored Feb 06, 2020
  
  2018d78d
Jan 31, 2020
- add NetworkXbar · e8f5f160
  Howard Mao authored Jan 30, 2020
  
  e8f5f160
- less repetition in declaration of Network IO · 2726c0a5
  Howard Mao authored Jan 30, 2020
  
  2726c0a5
- Ring/Mesh should be able to take generic chisel types, not just TLChannels · 8dd1b6b0
  Howard Mao authored Jan 30, 2020
  
  8dd1b6b0
Jan 28, 2020
- Merge branch 'dev' into sbus-ring · e2135e2a
  Howard Mao authored Jan 27, 2020
  
  e2135e2a
- set different channel buffer parameters separately in TL*Network · 162ed385
  Howard Mao authored Sep 13, 2019
  
  162ed385
- add TLMeshNetwork · 8c32e254
  Howard Mao authored Sep 13, 2019
  
  8c32e254
- separate topology-independent code from TLRingNetwork · 762e3c04
  Howard Mao authored Sep 13, 2019
  
  762e3c04
Jan 22, 2020
- Merge pull request #58 from ucb-bar/better_configs · c11549ba
  Jerry Zhao authored Jan 21, 2020
```
Refactor traits as CanHave traits
```
  c11549ba
Jan 17, 2020
- Refactor traits as CanHave traits · 62cf2629
  Jerry Zhao authored Nov 23, 2019
  
  62cf2629
Jan 16, 2020
- Merge pull request #59 from ucb-bar/uart-widget · db01ac15
  Abraham Gonzalez authored Jan 15, 2020
```
Add a UART Adapter
```
  db01ac15