Interface to vector units

Suggest name for plic domain

Fix extraction-width warnings

Hypervisor: drive mtinst/htinst

PTW: traverse check GPA bits higher than HGATP mode only if valid

Add illegal instruction detection to RVC decoder

Update SRAM.scala to improve perf on non-full sized reads

Change a_sublane to not count sublanes if it's a read. Reads return full data width, no matter if the A channel size is not the data width

Fix tile interrupt sources

Fix connection order of meip/seip to plic

Fix chisel3.experimental imports in debug/Periphery