For PTEs whose physical address is out-of-range, we need to set
`ae_ptw` instead of `ae_final` to raise access-fault.

Because non-leaf PTEs will not have R or X bits set, `ae_final`
will be overrided by page-fault exceptions.

(cherry picked from commit b8dad7f5)

Enable WARL custom CSRs, long-latency CSR accesses (backport #3388)

* Support setting custom CSRs from datapath

* Support CSR stalls

(cherry picked from commit 005c6dbe)

CSR: optionally set delegable hypervisor exceptions (backport #3401)

Given that usingHypervisor is used to distinguish whether the hardware
supports hypervisor extensions, we should use it for the delegable
exceptions as well.

(cherry picked from commit 026f4c9f)

(cherry picked from commit 43e0af10

)

Co-authored-by: John Ingalls <43973001+ingallsj@users.noreply.github.com>

(cherry picked from commit dc275c4a

)

Co-authored-by: John Ingalls <43973001+ingallsj@users.noreply.github.com>

+ replace `.U(i)` with `.U.extract(i)`

(cherry picked from commit 9a1dc2d4

)

Co-authored-by: SingularityKChen <chency_singularity@163.com>

+ add `()` to those empty argument list function call;
Auto-application to `()` is deprecated. Supply the empty argument list `()` explicitly to invoke method

(cherry picked from commit 9b383c56

)

Co-authored-by: SingularityKChen <chency_singularity@163.com>

+ add `case _` to make match be exhaustive

(cherry picked from commit 05d9db73

)

Co-authored-by: SingularityKChen <chency_singularity@163.com>

[WIP] Bump master to chisel 3.6

Add [m/s/h]envcfg CSRs to satisfy spec requirements (backport #3373)

(cherry picked from commit 99671423)

Fix TLJbarTest (backport #3374)

(cherry picked from commit e76a4ea4)

Make CreditedIO more usable (backport #3367)

Make AsyncQueue use Rawmodule (backport #3366)

(cherry picked from commit 5a5c1278)

(cherry picked from commit 8db73642)

(cherry picked from commit c8cf9351)

Fix TL unittests (backport #3369)

(cherry picked from commit ecf08f5a)

Fixes for unit-tests (backport #3364)

(cherry picked from commit a8068519)

Add support for an unsynthesizable ROB to produce a TracedInstruction stream with wdata (backport #3350)

(cherry picked from commit b3f391c0)

(cherry picked from commit d6c09c97)

# Conflicts:
#	src/main/scala/rocket/RocketCore.scala
#	src/main/scala/subsystem/Configs.scala

Support RoCC accels which define CSRs (backport #3358)

(cherry picked from commit 7ddf02a3)

Fix TLSourceShrinker (backport #3360)

(cherry picked from commit d503368d)

Support custom bundles in Trace (backport #3356)

(cherry picked from commit efa83373)

(cherry picked from commit f6f59c14)

(cherry picked from commit 57af7182)

(cherry picked from commit 85aca717)

Co-authored-by: Jack Koenig <koenig@sifive.com>