Don't examine a packet's xcpt signal if it might be invalid.  In this case,
the correct fix is to not examine xcpt at all; the deleted code was vestigial.
(Note, the other use of xcpt(j+1) in this code is indeed safe.)

Revert "Bump firrtl"

Bump firrtl

Update README_TRAVIS.md

add some headers

Clarify when to delete caches

Add tag ECC to D$

- Reduce reliance on s2_prb_ack_data due to future ECC changes
- Shave a cycle off valid, but clean, probes
- Code cleanup

Bump FESVR for multi-core support

Travis allows us to build on branch updates and on PRs. Right now our process is to build always on PRs, but to manually only build 'master' when we know that riscv-tools has been bumped (because that rebuilds the master cache which holds riscv-tools). But this is an annoying and error-prone processes that requires extra admin permissions.

With this change, i think we can just leave "Build Branch Updates" to "ON" and get the same effect we are currently doing manually, because only on update to master branch will it do a build. PRs to master branch will get a build. PRs to other branches will I believe NOT get a build.

Make sure that DCache s2_xcpt data scratchpad case is assigned to after initial assignment.

plic: Recode to use OH knowledge

plic: Use same recoding technique on complete as well as claim

complete was being set unconditionally

debug: Fix race between resumereq and resumeack

For an arbitrary DMI master on a fast clock running against a core
on a slow clock, there was a race between writing resumereq and
reading resumeack. When using JTAG DTM this does not occur in practice,
but clean it up for running simulations with FESVR and future DMI masters.

Flip dts itim and dtim references

This reverts commit e6c2d446.

This reverts commit 48390ed6.

Debug + WFI Interactions