Commits · built-in-device-params · github.com / ucb-bar / rocket-chip

Oct 27, 2020
- BuiltInDevices: Optional instantiation of TL adapters · 15431eec
  Ryan Macdonald authored Oct 26, 2020
  
  15431eec
Oct 25, 2020
- Merge pull request #2206 from chipsalliance/mprv · 78e26ed4
  Andrew Waterman authored Oct 24, 2020
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implement updated MPRV proposal
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  78e26ed4
Oct 24, 2020
- implement updated MPRV proposal · 6cb2b2af
  Andrew Waterman authored Nov 19, 2019
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See https://github.com/riscv/riscv-isa-manual/issues/427
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  6cb2b2af
- Merge pull request #2680 from chipsalliance/loosen-bundle-requirements · bb2667e8
  Albert Chen authored Oct 23, 2020
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loosen Node bundle accessor requirements
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  bb2667e8
- code review suggestions · 957fd7a0
  Albert Chen authored Oct 23, 2020
  
  957fd7a0
- loosen Node bundle accessor requirements · ddb2b52b
  Albert Chen authored Oct 23, 2020
  
  ddb2b52b
- IDPool: infer widths (#2679) · bac4a0f4
  John Ingalls authored Oct 23, 2020
  
  bac4a0f4
Oct 23, 2020
- Merge pull request #2678 from chipsalliance/b-ext · a63440f6
  Andrew Waterman authored Oct 22, 2020
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Add B-extension opcodes and object model description
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  a63440f6
- Add B-extension opcodes and object model description · 42a58aba
  Andrew Waterman authored Jun 24, 2020
  
  42a58aba
- IDPool: RegInit reset literal value (#2677) · d4359da1
  John Ingalls authored Oct 22, 2020
  
  d4359da1
- axi4: dont include <>s around any string that you dont want to be interpreted... · fea43653
  Henry Cook authored Oct 22, 2020
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axi4: dont include <>s around any string that you dont want to be interpreted as a graphml xml tag (#2638)
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  fea43653
- TileLink Monitor: C-Channel allow Release report param (#2675) · 7567c8be
  John Ingalls authored Oct 22, 2020
  
  7567c8be
Oct 22, 2020

IDPool: synthesis timing enhancement argument options (#2673) · 951c06b3

John Ingalls authored Oct 21, 2020

* IDPool: simplify select1 PriorityEncoder

* IDPool arguments for pre-calculating valid,select

* Chisel width interference

* IDPool argument revocableSelect to downgrade 'alloc' interface from Irrevocable to ReadyValid

951c06b3

Oct 21, 2020
- Merge pull request #2671 from wsong83/patch-1 · da85cbb9
  Jiuyang Liu authored Oct 21, 2020
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fix type mismatch when using WithExtMemSize
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  da85cbb9
- fix type mismatch when using WithExtMemSize · 2d6e99b8
  Wei Song (宋威) authored Oct 21, 2020
  
  2d6e99b8
Oct 16, 2020
- Merge pull request #2666 from chipsalliance/diplo-reset-sync · a002166a
  David Biancolin authored Oct 16, 2020
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[prci] Add a pair of diplomatic reset synchronizers
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  a002166a
- [prci] Add a pair of diplomatic reset synchronizers · 7b50656b
  David Biancolin authored Oct 13, 2020
  
  7b50656b
- PTWPerfEvents pte_miss/hit, l2hit (#2668) · d056461b
  John Ingalls authored Oct 15, 2020
  
  d056461b
- Merge pull request #2667 from chipsalliance/trigger-bundles-cloneType · 27485421
  Ryan Macdonald authored Oct 15, 2020
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Debug: val members in extTrigger bundles for compatibility with cloneType
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  27485421
Oct 15, 2020
- Debug: val members in extTrigger bundles for compatbility with cloneType · 33126054
  Ryan Macdonald authored Oct 14, 2020
  
  33126054
- Merge pull request #2657 from chipsalliance/brrmorre-rename-debug · b6ee9711
  Jack Koenig authored Oct 14, 2020
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rename debug
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  b6ee9711
- Workaround Chisel 3.4 naming bug · f05f7726
  Jack Koenig authored Oct 14, 2020
  
  f05f7726
Oct 14, 2020
- Add seipNode similar to meipNode (#2665) · 16cf15ca
  Alex Solomatnikov authored Oct 13, 2020
  
  16cf15ca
- Merge pull request #2662 from chipsalliance/docs-in-readme · f7f0c2a9
  Megan Wachs authored Oct 13, 2020
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Add nod to docs in the README
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  f7f0c2a9
Oct 13, 2020
- Merge pull request #2663 from chipsalliance/rotate-1 · 04e14064
  Andrew Waterman authored Oct 12, 2020
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Make rotates work when size<=1
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  04e14064
- Merge pull request #2659 from chipsalliance/rocket-xprop · d3e01e38
  Andrew Waterman authored Oct 12, 2020
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Misc. fixes to make Rocket tolerant to X-propagation
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  d3e01e38
- Make rotates work when size=1 · 532970d0
  Andrew Waterman authored Oct 12, 2020
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Fixes a zero-width-wire situation.
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  532970d0
- Merge pull request #2661 from khannaudit/dts-pmpgranularity · 72e01bc3
  Andrew Waterman authored Oct 12, 2020
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Add PMP granularity to DTS
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  72e01bc3
- Add nod to docs in the README · e2fff9af
  Megan Wachs authored Oct 12, 2020
  
  e2fff9af
- Add pmpgranularity to DTS · 660b9139
  Udit Khanna authored Oct 12, 2020
  
  660b9139
Oct 10, 2020
- bump hardfloat for X-propagation fix · 60d8c982
  Andrew Waterman authored Oct 09, 2020
  
  60d8c982
- Initialize pLRU state for X-tolerance · f7b19776
  Andrew Waterman authored Oct 09, 2020
  
  f7b19776
- Work aroud Verilog idiocy that (0 << 'x) is 'x · 1b5e88b1
  Andrew Waterman authored Oct 09, 2020
  
  1b5e88b1
- Fix a truly preposterous X-pessimism problem · 5908fe06
  Andrew Waterman authored Oct 09, 2020
  
  5908fe06
- Fix an X-pessimism problem in the Frontend · 3daa127f
  Andrew Waterman authored Oct 09, 2020
  
  3daa127f
- Make D$ X-tolerant · 20655ee4
  Andrew Waterman authored Oct 09, 2020
  
  20655ee4
- Make BTB X-tolerant · bf630c12
  Andrew Waterman authored Oct 09, 2020
  
  bf630c12
- Add state machine to initialize BHT because of X-pessimism · 338670d1
  Andrew Waterman authored Oct 09, 2020
  
  338670d1
- Reset RAS pointers because of X-pessimism · 41313ac9
  Andrew Waterman authored Oct 09, 2020
  
  41313ac9
Oct 09, 2020
- Merge pull request #2656 from chipsalliance/dcache-plru · c2c0a178
  Andrew Waterman authored Oct 09, 2020
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Make D$ replacement policy configurable
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  c2c0a178