Interrupts: Less Pessimistic Synchronization (#714)
* interrupts: Less pessimistic synchronization for the different interrupt types. There are some issues with the interrupt number assignments. * interrupts: Allow an option to NOT synchronize all the external interrupts coming into PLIC * interrupts: ExampleRocketChipTop uses PeripheryAsyncExtInterrupts. Realized 'abstract' doesn't do what I thought in Scala. * interrupts: use consistent async/periph/core ordering * interrupts: Properly condition on 0 External interrupts * interrupts: CLINT is also synchronous to periph clock
parent
9b688ce7
Please register or sign in to comment