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rocket-chip
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clock-source-troubles
065dc98d
·
WIP Trying to get clock-sources from FIRRTL to work
·
Feb 01, 2019
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name-fix
1d3a58bd
·
updating itim name
·
Feb 05, 2019
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CoreMonitorBundle_with_Clocked
b6127a5d
·
Extend CoreMonitorBundle with Clocked trait.
·
Feb 11, 2019
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async-reset
36139629
·
Use new AsyncReset support in chisel3 and firrtl
·
Feb 11, 2019
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has-axi4-control-reg-map
acd8384d
·
axi4: add HasAXI4ControlRegMap
·
Feb 11, 2019
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tile-unify-managers
7e60298c
·
tile: add unifyManagers to BaseTile
·
Feb 12, 2019
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regrouter-additions
81eb0c6d
·
merge
·
Feb 15, 2019
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update-omisa
ac5bbce4
·
OMISA mods
·
Feb 21, 2019
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top-level
90b153e9
·
Move FPU load pipeline register into ungated clock domain
·
Feb 22, 2019
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nomi20
2b5363dc
·
new
·
Mar 04, 2019
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no-debug
93d1d7d3
·
Removed Debug for an experiment
·
Mar 07, 2019
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peripherals
34e9e64f
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uart
·
Mar 16, 2019
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crossproperty-excludes
5eac7b7a
·
Do not create covers for crosses that are excluded
·
Mar 19, 2019
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rm-private
3cb479aa
·
remove unneccesary type declaration
·
Mar 23, 2019
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chosen
d98833b7
·
add chosen node to dts
·
Mar 29, 2019
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rebased-logical-tree3
0951c283
·
Revert "util: PSDTestModeBroadcastKey is ephemeral node"
·
Apr 01, 2019
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ntlbentries
647206d1
·
fix
·
Apr 08, 2019
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sbus-arbitration-2
17a54794
·
subsystem: add busView for system_bus_xbar
·
Apr 15, 2019
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user-interrupts
9db0be00
·
WIP on U-mode interrupts
·
Apr 22, 2019
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om-p
e0831afa
·
cleanup
·
Apr 23, 2019
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