Use parenthesis to make the side effects more obvious

Add GPIO object model

Addition of Peripherals OM for the SCD

Fix imports for Chisel 3.2

update wit and wake files

Correct a few typos

ChipLink StuckSnooper

Correct name of rxen field

* Stream: Clean up register descriptions and groupings

* Clean up linebreaks and parentheses for readability.

Allow optional bus blockers to be inserted while attaching devices

* Improve SPI flash ffmt register layout and fix some field names

* SPI: use automatic Reserved RegField

* SPI: Correct description for ffmt register

* SPI/UART: fix FIFO descriptions.

* SPIFlash: keep registers in ffmt group, but use different calls to preserve alignment