Merge #45

45: Add support for the riscv32i target r=almindor a=Disasm

Ported from [fomu-rt](https://github.com/im-tomu/fomu-rt)

Closes: https://github.com/rust-embedded/riscv-rt/pull/34



Co-authored-by: Vadim Kaushan <admin@disasm.info>