This reverts commit 3a76c3b2.

30: Fix docs, add MSRV policy, bump version r=dvc94ch a=Disasm



Co-authored-by: Vadim Kaushan <admin@disasm.info>

27: Add 'entry' and 'pre_init' attributes r=dvc94ch a=Disasm

Implementation is based on [`cortex-m-rt-macros`](https://github.com/rust-embedded/cortex-m-rt/tree/master/macros) code.

This implementation has been changed to make `static mut` unsafe inside entry point and different handlers.

Related: https://github.com/rust-embedded/riscv-rt/pull/20



Co-authored-by: Vadim Kaushan <admin@disasm.info>

28: Add support for 64-bit targets r=dvc94ch a=Disasm



Co-authored-by: Vadim Kaushan <admin@disasm.info>