Commits · gh-pages · github.com / riscveval / Rocket-Chip

Feb 06, 2017
- [+] pre-release documentation site · f2b0d865
  sergeykhbr authored Feb 05, 2017
  
  f2b0d865
Apr 17, 2016
- added doxy description: Ethernet, debugger, dsu · e31bde9a
  Sergey Khabarov authored Apr 17, 2016
  
  e31bde9a
Mar 01, 2016
- skipped doxy files · 239e5c3b
  Sergey Khabarov authored Mar 01, 2016
  
  239e5c3b
- add skipped pictures to doxygen generated docs · 22420f2a
  Sergey Khabarov authored Mar 01, 2016
  
  22420f2a
- doxygen update · 670bdf30
  Sergey Khabarov authored Mar 01, 2016
  
  670bdf30
Dec 26, 2015
- doxygen generated html update · df727e9f
  Sergey Khabarov authored Dec 26, 2015
  
  df727e9f
Dec 02, 2015
- re-create gh-pages branch · 637fd578
  sergeyx.khabarov authored Dec 02, 2015
  
  637fd578
- re-create gh-pages branch · 652860e9
  sergeyx.khabarov authored Dec 02, 2015
  
  652860e9
- doxy main page update · 86c126c7
  sergeyx.khabarov authored Dec 02, 2015
  
  86c126c7
- Add path to doxygen documentation · b659a637
  Sergey Khabarov authored Dec 02, 2015
  
  b659a637
- doxygen config fixed · c7daa75a
  Sergey Khabarov authored Dec 02, 2015
  
  c7daa75a
- doxygen initial version added. debugging problem with static inline funciton · 97e26b50
  Sergey Khabarov authored Dec 02, 2015
  
  97e26b50
Nov 27, 2015
- FW updated. Fix problem with masters request arbitrer. SRAM with init function... · a90faf4d
  Sergey Khabarov authored Nov 27, 2015
```
FW updated. Fix problem with masters request arbitrer. SRAM with init function implemented only for ModelSim simulation
```
  a90faf4d
Nov 22, 2015
- SYNTHESIS define made workable by adding proper resets signals · a2a745ae
  Sergey Khabarov authored Nov 21, 2015
  
  a2a745ae
Nov 20, 2015
- Fix with the return address in the interrupt handler · f3125c18
  Sergey Khabarov authored Nov 19, 2015
  
  f3125c18
Nov 19, 2015
- Description updated · b42e9723
  sergeyx.khabarov authored Nov 19, 2015
  
  b42e9723
- Merge branch 'master' of https://github.com/sergeykhbr/riscv_vhdl · 9110a879
  Sergey Khabarov authored Nov 19, 2015
  
  9110a879
- Tile2AXI bridges arbiter fix to support simultaneously request on cached/uncached links · ffd39174
  Sergey Khabarov authored Nov 19, 2015
  
  ffd39174
- ucf and xdc files added for Xilinx KC705 board · d2be3ec4
  denisnefedov authored Nov 18, 2015
  
  d2be3ec4
Nov 18, 2015
- The latest Rocket-Chip revision added. ROM config updated · e768b79f
  Sergey Khabarov authored Nov 17, 2015
  
  e768b79f
Nov 17, 2015
- irqctrl file added · 08150dc6
  Sergey Khabarov authored Nov 17, 2015
  
  08150dc6
- Interrupt controller was added. The latest rocket core generated. · c9280ed6
  Sergey Khabarov authored Nov 17, 2015
  
  c9280ed6
Nov 13, 2015
- UART polarity rts/cts fixed. Time interval tuned · 1620fe14
  Sergey Khabarov authored Nov 13, 2015
  
  1620fe14
Nov 12, 2015
- UART implemented. FW updated to support PNP module configuration info · 1dcd1597
  Sergey Khabarov authored Nov 11, 2015
  
  1dcd1597
Nov 09, 2015
- Description update · 05bd4601
  Sergey Khabarov authored Nov 09, 2015
  
  05bd4601
- ISE project was added. Description updated · 52be2326
  Sergey Khabarov authored Nov 09, 2015
  
  52be2326
- description of what is RISCV was added · f4cdb28e
  Sergey Khabarov authored Nov 09, 2015
  
  f4cdb28e
- Adding initial revision of the SoC. Verified on FPGA Virtex6 and Kintex7 · d6e0cc2c
  Sergey Khabarov authored Nov 08, 2015
  
  d6e0cc2c
- Initial commit · c1d669ff
  sergeykhbr authored Nov 09, 2015
  
  c1d669ff