zephyr: implementing linker.cmd script, fixing warning related to 64-bits platform. adding __start entry point that will be placed at 0x10000000 address

zephyr: gcc build initial version (linker error not fixed). elf64 support added for the offset generator

zephyr: added arch msvc and riscv64. Run nanokernel & shell example in msvc. cooperative and preemptive task/fibers switching tested

Adding Core's registers view command (regs) for simulation implementing access via DSU potentially compatible with HW

fix soc reset via debugger (stucked irq controller). DSU dummy registers address space was added to support future CPU run control debugging features and provide compatibility with simulation

linux fix: simulator multi-thread sync. System bus,greth classes were added. System events (Haps) implemented

doxy update (Ethernet setup, debugger help were added); fix in functional CPU model; thread exit fix

candidat v2 fix: bootrom bug fix that leads to corruption of SRAM entry point. Remove 2-dimen array on AXI data path that incorrectly synth. by Vivado

Debugger via Ethernet update. FW update. MAC bytes order was changed from SPARC like (msb) to x86 like (lsb)

Fix procedure call that crush Xilinx synthesizer. Constraints met. FW update. MAC enabling by default.

amba specific in a separate lib, fw and makefile update, ISE projects updates. RF front-end detector was added.