1. Jan 11, 2019
  2. Jan 10, 2019
  3. Jan 09, 2019
  4. Jan 08, 2019
    • Guo Ren's avatar
      csky: fixup CACHEV1 store instruction fast retire · 96354ad7
      Guo Ren authored
      
      
      For I/O access, 810/807 store instruction fast retire will cause wrong
      primitive. For example:
      
      	stw (clear interrupt source)
      	stw (unmask interrupt controller)
      	enable interrupt
      
      stw is fast retire instruction. When PC is run at enable interrupt
      stage, the clear interrupt source hasn't finished. It will cause another
      wrong irq-enter.
      
      So use mb() to prevent above.
      
      Signed-off-by: default avatarGuo Ren <ren_guo@c-sky.com>
      Cc: Lu Baoquan <lu.baoquan@intellif.com>
      96354ad7
    • Guo Ren's avatar
      csky: fixup relocation error with 807 & 860 · f553aa1c
      Guo Ren authored
      
      
      810 doesn't support jsri instruction and csky-as will leave
      jsri + nop for relocation. Module-probe need replace them with
      lrw + jsr.
      
      Signed-off-by: default avatarGuo Ren <ren_guo@c-sky.com>
      Cc: Hui Kai <huikai@acoinfo.com>
      f553aa1c