- Oct 17, 2021
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Daniel Schaefer authored
Signed-off-by:Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Abner Chang <abner.chang@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com>
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- Oct 15, 2021
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Guo Dong authored
V2: Fix GCC build issue. There is typo in previous change caused coreboot build failure. This patch fixed the build issue. Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by:
Guo Dong <guo.dong@intel.com> Reviewed-by:
Maurice Ma <maurice.ma@intel.com> Reviewed-by:
Ray Ni <ray.ni@intel.com>
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Ming Huang authored
As SMBIOS spec, bit-31 of maximum cache size 2 should be 1 for 64K granularity. Signed-off-by:
Ming Huang <huangming@linux.alibaba.com> Reviewed-by:
Rebecca Cran <rebecca@nuviainc.com> Acked-by:
Leif Lindholm <leif@nuviainc.com>
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- Oct 14, 2021
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Liu, Zhiguang authored
The SecurityStubDxe driver may be provided by platform payload. In UefiPayloadPkg\UefiPayloadPkg.fdf file, SecurityStubDxe should only be included if SECURITY_STUB_ENABLE is TRUE Cc: Guo Dong <guo.dong@intel.com> Reviewed-by:
Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by:
Zhiguang Liu <zhiguang.liu@intel.com>
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Heinrich Schuchardt authored
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3066 The SctPkg is managed in repository https://github.com/tianocore/edk2-test . Make SetupGit.py usable for this repository. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Yuwei Chen <yuwei.chen@intel.com> Reviewed-by:
Bob Feng <bob.c.feng@intel.com>
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Abner Chang authored
Relocate VirtioFdtDxe to OvmfPkg/Fdt, this driver is leverage by both ARM and RISC-V archs. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
Relocate FdtPciHostBridgeLib to OvmfPkg/Fdt, this library is leverage by both ARM and RISC-V archs. Also use PcdPciMmio32Translation and PcdPciMmio64Translation PCDs provided by MdePkg instead of ArmPkg. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
PcdPciMmio32Translation and PcdPciMmio64Translation PCDs are added to MdePkg as the common PCDs for ARM and RSIC-V archs. The one under ArmPkg is removed in the next patch. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com>
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Abner Chang authored
Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
Relocate QemuFwCfgLib to OvmfPkg/Library/QemuFwCfgLib and rename it to QemuFwCfgLibMmio, this library is leverage by both ARM and RISC-V archs. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
Add RISC-V VM in the file header. Add RISC-V to the supported arch. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
Relocate HighMemDxe to OvmfPkg/Fdt, this library is leverage by both ARM and RISC-V archs. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
Relocate PciPcdProducerLib to OvmfPkg/Fdt, this library is leverage by both ARM and RISC-V archs. Add OvmfPkg/Fdt maintainers in Maintainers.txt Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com>
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Abner Chang authored
PcdPciIoTranslation PCD is relocated to MdePkg and leveraged by both ARM and RISC-V arch. This patch removes the one from ArmPkg and address the corresponding changes required for other modules under ArmVirtPkg. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com>
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Abner Chang authored
This PCD is moved from ArmPkg that is used to set the base address of PCI MMIO window that provides I/O access. We relocate this PCD because this PCD is common to ARM and RSIC-V arch. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com>
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Abner Chang authored
This is one of the series patches to restructure the location of modules under ArmVirtPkg for RiscVVirtPkg. RiscVVirtPkg leverage FDT Client protocol to parse FDT nodes. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com> Acked-by:
Gerd Hoffmann <kraxel@redhat.com>
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Hua Ma authored
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3680 This patch fixes the following issue: The global variable gHandleList is a linked list. This list is locked when a entry is added or removed from the list, but there is no lock when iterating this list in function CoreValidateHandle(). It can lead to "Handle.c (76): CR has Bad Signature" assertion if the iterated entry in the list is just removed by other task during iterating. Currently some caller functions of CoreValidateHandle() have CoreAcquireProtocolLock(), but some caller functions of CoreValidateHandle() do not CoreAcquireProtocolLock(). Add CoreAcquireProtocolLock() always when CoreValidateHandle() is called, Also, A lock check is added in the CoreValidateHandle(). Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by:
Hua Ma <hua.ma@intel.com> Reviewed-by:
Dandan Bi <dandan.bi@intel.com> Reviewed-by:
Jian J Wang <jian.j.wang@intel.com>
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Konstantin Aladyshev authored
Add correct content to the 'SdDxeExtra.uni' file. Include 'EmmcDxeExtra.uni' and 'SdDxeExtra.uni' files to their appropriate INF files. Signed-off-by:
Konstantin Aladyshev <aladyshev22@gmail.com> Reviewed-by:
Hao A Wu <hao.a.wu@intel.com>
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Ma, Maurice authored
Current UefiPayloadPkg can suport PCI root bridge info HOB provided by bootloader. For UniversalPayload, bootloader can directly provide this HOB for payload consumption. However, for legacy UEFI payload, it is required to migrate the HOB information from bootloader HOB space to UEFI payload HOB space. This patch added the missing part for the bootloader ParseLib in order to support both legacy and universal UEFI payload. This patch was tested on Slim Bootloader with latest UEFI payload, and it worked as expected. Cc: Ray Ni <ray.ni@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by:
Maurice Ma <maurice.ma@intel.com> Reviewed-by:
Guo Dong <guo.dong@intel.com>
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- Oct 13, 2021
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Chen, Christine authored
Currently the realpath is used when parse modules, which shows the path with a drive letter in build log. In Windows 'subst' comand is used to associates a path with a drive letter, when use the mapped drive letter for build, with realpath function the build log will have different disk letter info which will cause confusion. In this situation, if use adspath function to show the path info, it will keep same letter with the mapped drive letter, which avoids confusion. This patch modifies the realpath to abspath. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by:
Yuwei Chen <yuwei.chen@intel.com> Reviewed-by:
Bob Feng <bob.c.feng@Intel.com>
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IanX Kuo authored
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3675 Add QuickSort function into BaseLib Reviewed-by:
Ray Ni <ray.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by:
Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by:
IanX Kuo <ianx.kuo@intel.com>
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Bob Morgan authored
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3617 Create a read-only openSSL BIO wrapper for the existing input buffer passed to Pkcs7Verify() instead of copying the buffer into an empty writable BIO which causes memory allocations within openSSL. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Guomin Jiang <guomin.jiang@intel.com> Signed-off-by:
Bob Morgan <bobm@nvidia.com> Reviewed-by:
Jiewen Yao <jiewen.yao@intel.com>
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- Oct 12, 2021
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Star Zeng authored
The patch adds entry into QueryTable.c for ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0. It also adds entries into QueryTable.c for ProcessorUpgradeSocketLGA4189 and ProcessorUpgradeSocketLGA1200 from SMBIOS 3.4.0. Signed-off-by:
Star Zeng <star.zeng@intel.com> Reviewed-by:
Liming Gao <gaoliming@byosoft.com.cn>
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Zeng, Star authored
This patch adds ProcessorUpgradeSocketLGA4677 definition into Smbios.h from SMBIOS 3.5.0. It also adds ProcessorUpgradeSocketLGA4189 and ProcessorUpgradeSocketLGA1200 definitions into from SMBIOS 3.4.0. Signed-off-by:
Star Zeng <star.zeng@intel.com> Reviewed-by:
Liming Gao <gaoliming@byosoft.com.cn>
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- Oct 11, 2021
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Liu, Zhiguang authored
The SecurityStubDxe driver may be provided by platform payload. Cc: Guo Dong <guo.dong@intel.com> Reviewed-by:
Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by:
Zhiguang Liu <zhiguang.liu@intel.com>
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- Oct 08, 2021
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Pierre Gondois authored
In the GIC interrupt model, logical processors are required to have a Processor Device object in the DSDT and must convey each processor's GIC information to the OS using the GICC structure. Additionally, _LPI objects may be needed as they provide a method to describe Low Power Idle states that defines the local power states for each node in a hierarchical processor topology. Therefore, add support to generate the CPU topology and the LPI state information in an SSDT table. Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Introduce the CM_ARM_LPI_INFO CmObj in the ArmNameSpaceObjects. This allows to describe LPI state information, as described in ACPI 6.4, s8.4.4.3 "_LPI (Low Power Idle States)". Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Add AmlAddLpiState() to generates AML code to add an _LPI state to an _LPI object created using AmlCreateLpiNode(). AmlAddLpiState increments the count of LPI states in the LPI node by one, and adds the following package: Package() { MinResidency, WorstCaseWakeLatency, Flags, ArchFlags, ResCntFreq, EnableParentState, (GenericRegisterDescriptor != NULL) ? // Entry method. If a ResourceTemplate(GenericRegisterDescriptor) : // Register is given, Integer, // use it. Use the // Integer otherwise ResourceTemplate() { // NULL Residency Register (SystemMemory, 0, 0, 0, 0) // Counter }, ResourceTemplate() { // NULL Usage Counter Register (SystemMemory, 0, 0, 0, 0) }, "" // NULL State Name }, Reviewed-by:Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
_LPI object provides a method to describe Low Power Idle states that define the local power states for each node in a hierarchical processor topology. Therefore, add AmlCreateLpiNode() to generate code for a _LPI object. AmlCreateLpiNode ("_LPI", 0, 1, ParentNode, &LpiNode) is equivalent of the following ASL code: Name (_LPI, Package ( 0, // Revision 1, // LevelId 0 // Count )) Reviewed-by:Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Add AmlCodeGenMethodRetNameString() to generate AML code to create a Method returning a NameString (NS). AmlCodeGenMethodRetNameString ( "MET0", "_CRS", 1, TRUE, 3, ParentNode, NewObjectNode ); is equivalent of the following ASL code: Method(MET0, 1, Serialized, 3) { Return (_CRS) } Reviewed-by:Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Add AmlCodeGenReturnNameString() to generate AML code for a Return object node, returning the object as a NameString. AmlCodeGenReturn ("NAM1", ParentNode, NewObjectNode) is equivalent of the following ASL code: Return(NAM1) Reviewed-by:Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Add AmlCodeGenMethod() to generate code for a control method. AmlCodeGenMethod ("MET0", 1, TRUE, 3, ParentNode, NewObjectNode) is equivalent of the following ASL code: Method(MET0, 1, Serialized, 3) {} Reviewed-by:Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
ASL provides a ResourceTemplate macro that creates a Buffer in which resource descriptor macros can be listed. The ResourceTemplate macro automatically generates an End descriptor and calculates the checksum for the resource template. Therefore, add AmlCodeGenResourceTemplate() to generate AML code for the ResourceTemplate() macro. This function generates a Buffer node with an EndTag resource data descriptor, which is similar to the ASL ResourceTemplate() macro. Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Some AML object have a PkgLen which indicates the size of the AML object. The package length can be encoded in 1 to 4 bytes. The bytes used to encode the PkgLen is itself counted in the PkgLen value. So, if an AML object's size increments/decrements, the number of bytes used to encode the PkgLen value can itself increment/decrement. Therefore, a helper function AmlComputePkgLength() is introduced to simply computation of the PkgLen. Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Add AmlCodeGenPackage() to generate AML code for declaring a Package() object. This function generates an empty package node. New elements can then be added to the package's variable argument list. Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Add a helper function AmlCodeGenEndTag() to generate AML Resource Data EndTag. The EndTag resource data is automatically generated by the ASL compiler at the end of a list of resource data elements. Therefore, an equivalent function is not present in ASL. However, AmlCodeGenEndTag() is useful when generating AML code for the ResourceTemplate() macro. Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Add AmlCodeGenRegister() to generate AML code for the Generic Register Resource Descriptor. This function is equivalent to the ASL macro Register(). Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
Remove the STATIC qualifier for the AmlUtility function AmlNodeGetIntegerValue() and add the definition to the header file so that it can be used by other AmlLib sub-modules. Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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Pierre Gondois authored
The node creation functions: - AmlCreateRootNode() - AmlCreateObjectNode() - AmlCreateDataNode() are now resetting the input pointer where the created node is stored. Thus, it is not necessary to set some local variables to NULL or check a node value before trying to delete it. Reviewed-by:
Sami Mujawar <sami.mujawar@arm.com> Signed-off-by:
Pierre Gondois <Pierre.Gondois@arm.com>
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