This encoding needs to examine fewer bits to determine whether an
instruction writes x[rd].  It also frees up some encoding space
by leveraging the fact that the to-scalar and from-scalar instructions
can occupy the same funct6.

The VMUNARY0 opcode is moved to simplify vs1 read-enable decoding.

Resolves #248

Replace vext.x.v with vmv.x.s

This regularizes the integer moves with the floating-point ones, and
simplifies the implementation.

The effect of vext.x.v can be obtained with vslidedown.vx followed by
vmv.x.s.

Closes #154

Add overlap constraint to vlxseg to support restart

Masked vslidedown is no different than other masked instructions,
in that the overlap is only problematic when LMUL > 1.  The
Vector Masking section states this weaker constraint.

This is already covered by the Vector Masking section.

Improve description of vfredsum/vfredosum instructions

Split merge and move instructions into separate sections

Since we now describe vmerge and vmv as different instructions, it is clearer
to disentangle their descrptions.  Mention of the fact that they share an
encoding has been moved to a NOTE.

Resolves #238.

Provide new specification of floating-point unordered sum reduction according to task group meeting of 6/28/2019.
Closes #225.

Rename vmpopc/vmfirst to vpopc/vfirst; move to VMUNARY0 opcode

Weaken constraint on VMADC overlap; apply new constraint to all comparisons

* Treat vrgather scalar register index as unsigned

The index in scalar register should also be unsigned, so express it
explicitly.

Signed-off-by: Weiwei Wang <weiwei.wangx@outlook.com>

* Replace imm with uimm for shift instructions

When an immediate is used as a shift, it is treated as unsigned, so
use uimm explictly to reflect it.

Signed-off-by: Weiwei Wang <weiwei.wangx@outlook.com>

A literal reading of the current text would imply it should be signed (as that is the default and vrgather's description says nothing to the contrary), but negative immediates are useless on this instruction, as they would (after sign extension) be larger than 2^31 and thus exceed VLMAX on any implementation and just splat a constant 0 into the destination.

FWIW, binutils currently treats it as unsigned.

FIX(inst-table.adoc) asciidoctor-pdf Prawn::Errors::CannotFit.

Constrain vms*f to require vstart = 0

Rationale is similar to that for vmpopc/vmfirst, and avoids need for
a constraint on `vd`.

Closes #201.

Replaced widening multiply-subtract instructions with widening signed/unsigned multiply-add instructions.

Made integer single-width multiply-subtract opcode names and function match the scalar/vector floating-point operation names/functions.