1. Apr 15, 2017
    • Palmer Dabbelt's avatar
      Remove the hart_state variable · 4b21319d
      Palmer Dabbelt authored
      The new code always keeps harts in consistant states, so it's no longer
      necessary to track their states manually.  There's still some flakyness
      with halt/resume over breakpoints.
      4b21319d
    • Palmer Dabbelt's avatar
      Replace the 0.13-specific "program_t" with a generic one · bb2cceac
      Palmer Dabbelt authored
      This new version changes how we handle temporary registers: rather than
      tracking them by hand (like in the old code), they're now tracked as
      part of assembling programs.  The register save/restore assertion that
      used to fire all the time no longer exists.
      bb2cceac
  2. Apr 11, 2017
  3. Apr 08, 2017
  4. Apr 07, 2017
  5. Apr 05, 2017
  6. Mar 31, 2017
  7. Mar 24, 2017
  8. Mar 23, 2017
  9. Mar 22, 2017
  10. Mar 16, 2017
    • Megan Wachs's avatar
      riscv-v13: wait for idle in read_memory · a70e6286
      Megan Wachs authored
      read_memory was doing autoexec-initialized commands, but wasn't using
      ac_busy_delay to add delay or wait between the commands. This isn't the optimal
      solution, but the whole read_memory sequence needs to be made more efficient
      anyway, so this was the quick and dirty solution.
      a70e6286
  11. Feb 28, 2017
  12. Feb 26, 2017
  13. Feb 23, 2017
    • Tim Newsome's avatar
      Speed things up by ignoring return values. · 3bd661b6
      Tim Newsome authored
      The remote bitbang implementation is really slow when reading back data.
      During many operations, like writing a block of memory, we don't need to
      see the return data. By communicating this to the lower layers, we get
      huge speedups. Downloads to spike now are 295KB/s.
      
      That means the gdbserver.py download test now runs to completion,
      unfortunately it fails. Everything else is still passing, though, so I'm
      committing this change.
      
      Change-Id: I44cc9db1ade0908c1a12d09b23fc8e529a802d88
      3bd661b6
  14. Feb 22, 2017
  15. Feb 21, 2017
  16. Feb 18, 2017
    • Tim Newsome's avatar
      Fix access FPU registers again. · 3173314f
      Tim Newsome authored
      Not a great fix. There's still a problem with accessing 64-bit floating
      point registers on 32-bit cores.
      24 of the gdbserver.py tests pass now.
      
      Change-Id: I69a88ef5fd5581e2c7bf1d78057fd474ae86ff93
      3173314f
    • Tim Newsome's avatar
      Fix use of REG vs CSR constants. · 071f9a29
      Tim Newsome authored
      23 gdbserver.py tests pass now.
      
      Change-Id: I32805d615ae5f536f179baf906e0e74a56e80c0b
      071f9a29