Code taken from http://openocd.zylin.com/#/c/4178/

Fix 32-bit build errors.

Perform regular build with travis.

Add back support for type 1 triggers

Fix the multi-GDB mode bugs

Restore value of temporary register (s0) in examine OpenOCD procedure…

I only compiled the source. Didn't have the tooling installed to link.
Hopefully that's good enough.
Fixes #71.

They were implemented, and people want to keep using them.
Also make OpenOCD tolerate cores that have $misa at 0xf10 instead of the
current address of 0x301.
Actually return an error when we fail to read a CSR.
Tweak cache_set32() debug output.

Restore value of temporary register (s0) in examine OpenOCD procedure in case of core can not execute 64 bit instruction.

Also slightly improve debugging output.

I was just being lazy here.

Now that we're supporting non-RTOS multi-hart mode there's some more
assertions that you're running on the right hart.  Those assertions
aren't sane very early in examine, so I avoid them.

Rather than having a bunch of "if rtos" stuff, I now just check "if
hart_enabled".  This makes some code paths cleaner, all of which were
buggy in the non-RTOS multi-hart mode.

This avoids a bunch of RTOS special cases.

Testsuite now passes on multicore target

Right now we're using "threads" to represent harts. gdb/OpenOCD assume
there's only one set of hardware breakpoints among all threads. Make it
so.

This ensures that "info threads" is accurate as soon as gdb connects.
Also print out number of triggers that is discovered in examine().

Various cosmetic improvements

Update debug_defines from the spec, commit 920ec9a690.
Decode dmstatus scans in the debug output.

Assuming the program allocating code works, we don't need its output.
Only output parts of the debug RAM that are actually doing something.

Fix indentation to match OpenOCD style.

This change is just in the whitespace. There are no code changes.

See http://openocd.org/doc-release/doxygen/stylec.html

Two fixes from the release branch

Fix print statements to work with 64-bit addresses

When I disappeared the polls everywhere I forgot to sanitize the hartid
after halting.  This is an invariant that GDB expects: when you return
from a halt whatever thread is marked as currently selected is the
thread that the next register accesses reference.

Accept 64-bit addresses in CRC requests.