Synchronize priv-instr-table.tex with the Manual (#99)
This commit roughly synchronizes privileged instruction table with the ISA
Manual with slight instruction order modifications, expecting instruction
tables in the ISA Manual are fully generated by riscv-opcodes,
not modified by hand.
This is based on:
* riscv/riscv-isa-manual: commit f30a5f6de685
("Update chapters 2 and 7 for Hypervisor v0.6")
* riscv/riscv-opcodes: commit 65af4131
("Virtual memory updates (#76)")
parent
ba481c27
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