* pci/host-exynos:
  PCI: exynos: Remove redundant of_match_ptr
  PCI: designware: Add irq_create_mapping()
  PCI: designware: Make dw_pcie_rd_own_conf(), etc., static
  PCI: designware: Add header guards
  PCI: exynos: Add missing clk_disable_unprepare() on error path

* pci/gregkh-driver-core:
  PCI: Make pci_bus_attrs, pci_dev_attrs, dev_rescan_attr, dev_remove_attr, vga_attr static
  PCI: convert bus code to use dev_groups
  PCI: convert bus code to use drv_groups
  PCI: convert bus code to use bus_groups

This driver is DT only.  Hence of_match_ptr is not required.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>

Without irq_create_mapping(), the correct IRQ number cannot be
provided.  In this case, it makes problems such as NULL dereference.
Thus, irq_create_mapping() should be added for MSI.

Suggested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

The following variables and functions are used only in pcie-designware.c,
so make them static:

  global_io_offset
  dw_pcie_rd_own_conf()
  dw_pcie_wr_own_conf()
  dw_pcie_setup()
  dw_pcie_scan_bus()
  dw_pcie_map_irq()

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>

Add header guards to prevent redundant inclusion.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Local variables used only in this file are made static.

[bhelgaas: also make pci_dev_attrs[] static (from Fengguang)]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

The dev_attrs field of struct bus_type is going away soon, dev_groups
should be used instead.  This converts the PCI bus code to use the
correct field.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

The drv_attrs field of struct bus_type is going away soon, drv_groups
should be used instead.  This converts the PCI bus code to use the
correct field.

Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

The bus_attrs field of struct bus_type is going away soon, dev_groups
should be used instead.  This converts the PCI bus code to use the
correct field.

Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Add the missing clk_disable_unprepare() before return
from exynos_pcie_probe() in the error handling case.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>

* pci/misc:
  PCI: Remove unused PCI_MSIX_FLAGS_BIRMASK definition
  PCI: acpiphp_ibm: Convert to dynamic debug
  PCI: acpiphp: Convert to dynamic debug
  PCI: Remove Intel Haswell D3 delays
  PCI: Pass type, width, and prefetchability for window alignment
  PCI: Document reason for using pci_is_root_bus()
  PCI: Use pci_is_root_bus() to check for root bus
  PCI: Remove unused "is_pcie" from pci_dev structure
  PCI: Update pci_find_slot() description in pci.txt
  [SCSI] qla2xxx: Use standard PCIe Capability Link register field names
  PCI: Fix comment typo, remove unnecessary !! in pci_is_pcie()
  PCI: Drop "setting latency timer" messages

PCI_MSIX_FLAGS_BIRMASK has been replaced by PCI_MSIX_TABLE_BIR for better
readability.  Now no one uses it, remove it.  No functional change.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

* pci/host-tegra:
  PCI: tegra: Add missing __iomem annotation

* pci/host-imx6:
  PCI: imx6: Add support for i.MX6 PCIe controller
  ARM: imx6q: Add PCIe bits to GPR syscon definition

Add support for the PCIe port present on the i.MX6 family of controllers.
These use the Synopsis Designware core tied to their own PHY.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>

PCIe requires additional bits be defined for GPR8 and GPR12.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

* pci/host-exynos:
  PCI: exynos: Turn off power of phy block when link failed
  PCI: exynos: Add support for MSI
  MAINTAINERS: Add Jingoo Han as Samsung Exynos PCIe driver maintainer

This patch is to use pr_debug/info/warn/err to replace acpiphp_ibm debug
functions and remove module's debug param.

User interface change: before this patch, boot with the "acpiphp_ibm.debug"
kernel parameter to turn on debug.  After this patch, set
CONFIG_DYNAMIC_DEBUG=y and boot with "acpiphp_ibm.dyndebug=+p" instead.
See Documentation/dynamic-debug-howto.txt.

[bhelgaas: changelog]
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

This patch is to use pr_debug/info/warn/err to replace acpiphp debug
functions and remove module's debug param.

User interface change: before this patch, boot with the "acpiphp.debug"
kernel parameter to turn on debug.  After this patch, set
CONFIG_DYNAMIC_DEBUG=y and boot with "acpiphp.dyndebug=+p" instead.
See Documentation/dynamic-debug-howto.txt.

[bhelgaas: changelog]
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Added missing __iomem annotation in order to fix the following
sparse warnings:

drivers/pci/host/pci-tegra.c:411:41: warning: incorrect type in return expression (different address spaces)
drivers/pci/host/pci-tegra.c:411:41:    expected void [noderef] <asn:2>*
drivers/pci/host/pci-tegra.c:411:41:    got void *addr
drivers/pci/host/pci-tegra.c:419:25: warning: incorrect type in return expression (different address spaces)
drivers/pci/host/pci-tegra.c:419:25:    expected void [noderef] <asn:2>*
drivers/pci/host/pci-tegra.c:419:25:    got void *addr

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>

When link failed, there is no need to turn on phy block. Also,
turning on phy block is added, in order to turn on phy block
regardless of the default value of phy registers.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

This patch adds support for Message Signaled Interrupt in the
Exynos PCIe driver using Synopsys designware PCIe core IP.

Signed-off-by: Siva Reddy Kallam <siva.kallam@samsung.com>
Signed-off-by: Srikanth T Shivanand <ts.srikanth@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>

Add myself as maintainer for Samsung Exynos PCIe driver.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

The latest Intel Haswell chipsets have a hardware optimization which
allows on-chip PCI devices to ignore the 10ms delay before entering
or exiting D3 suspend.

This patch implements the optimization as a PCI quirk, since we want
tight control over which devices use it. This way we can test each device
individually to be sure there are no issues before we enable the quirk.
The first set of devices are from the Haswell platform, which includes
every PCI device that is on the northbridge and southbridge.

This patch reduces the Haswell suspend time from 93 ms to 47 ms and resume
time from 160 ms to 64 ms.

Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

When calculating window_alignment(), type information like IORESOURCE_MEM
and IORESOURCE_PREFETCH may not be enough.  For example, on powernv, we
need to know whether the window is 64-bit or not.

This patch passes the full resource type (res->flags) for window alignment.

[bhelgaas: changelog]
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>

Some code assumes "bus->self == NULL" means the bus is a root bus.  This
adds a comment explaining why this is incorrect ("virtual" buses added for
SR-IOV have "bus->self == NULL" but are not root buses).

No functional change.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

In __pci_bus_size_bridges() we check whether a bus is a root bus by testing
bus->self.  As indicated by commit 79af72d7

 ("PCI: pci_is_root_bus
helper"), bus->self == NULL is not a proper way to check for a root bus.
One issue is that "virtual" buses added for SR-IOV (via virtfn_add_bus())
have bus->self == NULL but are not root buses.

This patch changes it to pci_is_root_bus() to check whether it is a root
bus.

[bhelgaas: changelog]
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

No one uses "is_pcie" now; remove this obsolete member.

Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

pci_find_slot() has been removed from the kernel.  Document its
closest replacement, pci_get_domain_bus_and_slot(), instead.

[bhelgaas: fix indentation, keep mention in "obsolete" section]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Use the standard #defines for PCIe Link Capability register fields
rather than bare numbers.  This also uses the new PCI Express Capability
accessor rather than reading the capability directly.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Acked-by: Giridhar Malavali <giridhar.malavali@qlogic.com>

Use normal kernel-doc "Returns:" instead of "retrun"
Assignment to bool is always 1 or 0 so the !! isn't necessary.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

This message isn't useful any more, so drop it.

Reference: https://bugzilla.kernel.org/show_bug.cgi?id=60636


Reported-by: Oleksil Shevchuk <alxchk@gmail.com>
Reference: http://lkml.kernel.org/r/CALCETrWkr53ZjqdN3t7rTTfr=+ZKZXJoYsuBcwPf0kN_33GfAw@mail.gmail.com


Reported-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

* pci/yijing-pci_is_pcie-v2:
  powerpc/pci: Use pci_is_pcie() to simplify code
  [SCSI] qla2xxx: Use pcie_is_pcie() to simplify code
  [SCSI] csiostor: Use pcie_capability_clear_and_set_word() to simplify code
  [SCSI] bfa: Use pcie_set()/get_readrq() to simplify code
  x86/pci: Use cached pci_dev->pcie_cap to simplify code
  PCI: Use pci_is_pcie() to simplify code

* pci/bjorn-osc:
  PCI/ACPI: Decode _OSC bitmasks symbolically
  PCI/ACPI: Separate out _OSC "we don't support enough services" path
  PCI/ACPI: Separate out _OSC "PCIe port services disabled" path
  PCI/ACPI: Skip _OSC control tests if _OSC support call failed
  PCI/ACPI: Run _OSC only once for OSPM feature support
  PCI/ACPI: Split _OSC "support" and "control" flags into separate variables
  PCI/ACPI: Move _OSC stuff from acpi_pci_root_add() to negotiate_os_control()
  PCI/ACPI: Drop unnecessary _OSC existence tests
  PCI/ACPI: Name _OSC #defines more consistently
  ACPI: Write OSC_PCI_CONTROL_MASKS like OSC_PCI_SUPPORT_MASKS
  ACPI: Remove unused OSC_PCI_NATIVE_HOTPLUG
  ACPI: Tidy acpi_run_osc() declarations
  ACPI: Rename OSC_QUERY_TYPE to OSC_QUERY_DWORD
  ACPI: Write _OSC bit field definitions in hex

This updates _OSC-related messages to be more human-readable.  We now always
show the features we declare support for (this was previously invisible) as
well as the features we are granted control of.

Typical changes:

  -acpi PNP0A08:00: Requesting ACPI _OSC control (0x1d)
  -acpi PNP0A08:00: ACPI _OSC control (0x1d) granted
  +acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
  +acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Test the services we support (extended config space, ASPM, MSI) separately
so we can give a better message.  Previously we said "Unable to request
_OSC control..."; now we'll say "we support %#02x but %#02x are required".

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Test "pcie_ports_disabled" separately so we can give a better message.
Previously we said "Unable to request _OSC control..."; now we'll
say "PCIe port services disabled; not requesting _OSC control".

"pcie_ports_disabled" is true when CONFIG_PCIEPORTBUS=n or we boot
with "pcie_ports=compat".

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

If the _OSC support notification fails, we will never request control
(because "support == OSC_PCI_SEGMENT_GROUPS_SUPPORT", which doesn't include
all the features in ACPI_PCIE_REQ_SUPPORT), so we can return early to
simplify the code.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Previously, we ran _OSC once to tell the platform that we support
PCI Segment Groups, then we ran it again if we supported any additional
features (ASPM, MSI, or extended config space).  I don't think it's
necessary to run it twice, since we can easily build the complete
mask of features we support before running _OSC the first time.

We run _OSC again later when requesting control of PCIe features;
that's unaffected by this change.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>