Unverified Commit b60a66c9 authored by Palmer Dabbelt's avatar Palmer Dabbelt
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RISC-V: Disable preemption before enabling interrupts when booting secondary harts



I'm not sure, but I think this was a bug: if the scheduler fired right
here then I believe it would blow up.

Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
parent ab8e24de
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