No functional change.

No functional change.

Implement Smepmp extension

Implement mcontrol.hit bit

This fix print x5 as "x5 ", instead of "x 5".

Whereas spike-dasm.cc now instanciates an isa_parser_t,
the dependance on libriscv.a has become unconditional.

It was removed from the spec a long time ago.

Bug Fix for bug introduced in PR #976

It's not writable anyway.

In future, someone may expect this functionality.

Is passed along to the contained store_func.

Will be used similarly as in load_func.

add macro support for instructions with overlapping encodings and fix partial style problems

* add DECLARE_OVERLAP_INSN to bind instructions with extension
* add overlap_list.h to contain the declare of all overlapping instructions
* make func function for overlapping instruction return NULL when the coresponding
extension(s) is not supported.

Move a few more configuration arguments into cfg_t

Fix for #873 AMO exception priorities

Didn't want to make change in previous commit to isolate the change.

This includes skipping store in store_slow_path.

Is okay to skip the mmio_store part too, since the access_fault for mmio_failure will be caught on the actual store.

The ordering for the mmio_access fault is irrelevant since it will occur after the TW faults, and load faults are converted to store faults.

Will catch any faults from the access but won't perform a store.

Since store permissions can only be granted if read permissions exist,

any store faults will occur before or at the same time as a load fault.

Thus this store permissions check is sufficient for properly catching the faults in an Amo access TW.

Will be used to check store attributes without actually performing the store.

Needed to AMO bug fix.

Now we have hartids, we can remove nprocs so that we have a single
source of truth.

The only slightly difficult thing here is that hartids will always
be considered "overridden" by the time we get to sim_t::sim_t (either
overridden by a command line argument, or overridden when we set
default hartids just before the constructor). To allow downstream code
to distinguish between "I picked IDs 0, 1, 2, 3 because the user asked
for 4 processors" and "The user explicitly asked for IDs 0, 1, 2, 3",
we have an extra explicit_hartids field.

This moves another part of the "configuration" out of the generic
sim.cc code.

We now parse to a std::vector<int> and then set the "hartids" variable
to the result.

There is a slight functional change here, in that if you pass
"--hartids 1,2,3 --hartids 4,5", you'll now get 2 cores with ids of
4,5 rather than 5 cores with ids of 1,2,3,4,5. This is what most tools
do with repeated command line arguments and I suspect the old
behaviour was actually by accident!