Skip to content
GitLab
Projects
Groups
Topics
Snippets
/
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
Menu
github.com
riscv
riscv-isa-sim
Commits
4d8651be
Unverified
Commit
4d8651be
authored
Dec 11, 2023
by
Jerry Zhao
Committed by
GitHub
Dec 11, 2023
Browse files
Merge pull request #1313 from endeneer/fdt-parse-clint-sifive
riscv: sim.cc: Parse for "sifive,clint0" if "riscv,clint0" is absent
parents
f9cd7ee5
f1c00083
Changes
1
Hide whitespace changes
Inline
Side-by-side
Preview
Supports
Markdown
0%
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment