- May 14, 2024
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Kito Cheng authored
I found this issue when I regen the configure script, but seems like configure is right...
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- Apr 26, 2024
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Christoph Müllner authored
Test results (with --enable-multilib): ``` ========= Summary of gcc testsuite ========= | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | rv32imac/ ilp32/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | rv32imafdc/ ilp32d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | rv64imac/ lp64/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | rv64imafdc/ lp64d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | ``` Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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Christoph Müllner authored
``` ========= Summary of gcc testsuite ========= | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | rv64gc/ lp64d/ medlow | 0 / 0 | 0 / 0 | - | rv32imafc/ ilp32f/ medlow | 0 / 0 | 0 / 0 | - | ``` Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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- Apr 24, 2024
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Christoph Müllner authored
Test results (rv64/rv32): ``` ========= Summary of gcc testsuite ========= | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | rv64gc/ lp64d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | rv32gc/ ilp32d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | ``` Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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Christoph Müllner authored
Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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- Apr 11, 2024
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Kito Cheng authored
RISCV: Add target_board generation for multiple arch_abi parameters
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- Apr 10, 2024
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wangpc authored
If `libslirp` is found during configuration, it will be enabled. So we just need install `libslirp` before building.
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- Apr 06, 2024
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Christoph Müllner authored
This commit bumps newlib from 4.3.0 to 4.4.0. Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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ff520git authored
In order to generate target board info for multilib, the parameters of build-arch-abi should be enclosed in double quotation marks. And the the python script generate_target_board will process it correctly Signed-off-by:ff520git <wangfeng@eswincomputing.com>
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- Apr 05, 2024
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Valen authored
Update README.md to indicate core model option Signed-off-by:
Valen <18544814+SpiccyMayonnaise@users.noreply.github.com> Signed-off-by:
Christoph Müllner <christoph.muellner@vrull.eu> Co-authored-by:
Christoph Müllner <christoph.muellner@vrull.eu>
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- Mar 27, 2024
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ff520git authored
RISCV: Add target_board generation for multiple arch_abi parameters Currently this script just can handle one parameter for arch_abi,but there is more than one arch_abi in "newlib_multilib_names" which comes from the configure. Execute the following command: generate_target_board --sim-name riscv-sim --cmodel medany --build-arch-abi "rv32imafc-ilp32f rv64imafdc-lp64d" Before this patch the result is: riscv-sim/-march=rv32imafc/-mabi=ilp32f rv64imafdc/-mcmodel=medany After this patch,the result is: riscv-sim/-march=rv32imafc/-mabi=ilp32f/-mcmodel=medany riscv-sim/-march=rv64imafdc/-mabi=lp64d/-mcmodel=medany At the same time,there is small modification for Makefile.in,the parameters of build-arch-abi should be enclosed in double quotation marks. --build-arch-abi "$(NEWLIB_MULTILIB_NAMES)" Signed-off-by:ff520git <wangfeng@eswincomputing.com>
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- Feb 29, 2024
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wangpc authored
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wangpc authored
We need to build LLVMgold.so and copy it to installation dir. I think it deserves to be default, so I don't add an option to enable this.
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Christoph Müllner authored
A significant amount of users of this project are using it for toolchain development. These users need to ensure that their code is warning free before submitting it upstream. Let's support this use case by adding a configure flag '--enable-host-gcc', which does exactly that: * build a host GCC before building other components * setting PATH such that this new GCC is used to build the cross toolchain * enable -Werror for the GCC build This patch was tested on a Fedora 39 machine (GCC 13), with the following modification in a GCC source file: #if __GNUC__ == 13 #error Host compiler in use! #endif This fails when building without the new flag and does not fail when building with latest upstream/master (GCC 14 prerelease). The '--enable-werror-always' was tested with a warning that showed up recently in upstream GCC. Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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Christoph Müllner authored
Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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- Feb 01, 2024
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Christoph Müllner authored
Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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Christoph Müllner authored
Test results (rv64): ``` ========= Summary of gcc testsuite ========= | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | rv64gc/ lp64d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | ``` Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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Christoph Müllner authored
Testing result (rv64): ``` ========= Summary of gcc testsuite ========= | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | rv64gc/ lp64d/ medlow | 0 / 0 | 0 / 0 | 0 / 0 | ``` Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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- Dec 19, 2023
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Pan Li authored
Signed-off-by:Pan Li <pan2.li@intel.com>
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Pan Li authored
According to the ISA, the zve32/zve64 xdf decides the elen of the RVV. Thus we should pick up extension instead of xlen for spike varch generation. Signed-off-by:Pan Li <pan2.li@intel.com>
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- Dec 13, 2023
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Pan Li authored
The default value of subarray is the length, thus we should take `idx` instead of `idx - 1` here. Signed-off-by:Pan Li <pan2.li@intel.com>
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- Dec 11, 2023
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Kito Cheng authored
Document prerequisites on Testing
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Kito Cheng authored
Add misaligned memory access for spike.
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Kito Cheng authored
Add OR operator for option '--with-extra-multilib-test'
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- Dec 08, 2023
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Yanzhang Wang authored
The spec does not forbid the misaligned memory access. And the gcc will generate vector load/store to access misaligned memory by default. Currently the QEMU supports this feature, so to support in spike is also make sense. Reference test case: gcc/gcc/testsuite/gcc.dg/vect/vect-align-1.c
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- Dec 01, 2023
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Tatsuyuki Ishi authored
Some glibc tests like tst-unwind-{main,ctor} depends on stage2 artifacts (in particular, GCC runtime libs) to be properly installed. Add stage2 dependencies to avoid these tests from spuriously failing. The test suite also uses the simulator and Deja GNU, both of which were not declared as dependencies, so add them as well. Closes: https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1379
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- Nov 30, 2023
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Tsukasa OI authored
pyelftools is required for a helper script. This commit adds basic installation guide to install pyelftools and removes "automatic installation" of pyelftools from Makefile.
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- Nov 28, 2023
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Tsukasa OI authored
Due to multiple accidents while releasing GNU Binutils, version 2.41, there are multiple tags that are broken. The true commit representing the version 2.41 of GNU Binutils is the head of `binutils-2_41-release-point` branch. This commit partially reverts commit c7853bf3.
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Pan Li authored
This patch allows you provide the flags in build flags array acts on arch-abi __respectively__, you can use ',' to separate them. For example: `rv64gcv-lp64d:--param=riscv-autovec-lmul=dynamic,--param=riscv-autovec-preference=fixed-vlmax` will be consider as two target boards same as below: ``` riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-preference=fixed-vlmax riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=dynamic ``` However, you can also leverage AND(`:`), OR(`,`) operator together but the OR(`,`) will always have the higher priority. For example: `rv64gcv-lp64d:--param=riscv-autovec-lmul=dynamic:--param=riscv-autovec-preference=fixed-vlmax,--param=riscv-autovec-lmul=m2` will be consider as tow target boars same as below: ``` riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=dynamic/--param=riscv-autovec-preference=fixed-vlmax riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2 ``` Signed-off-by:Pan Li <pan2.li@intel.com>
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- Nov 27, 2023
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Christoph Müllner authored
This patch imports the Linux kernel from v5.10.5 to v6.6. Important RISC-V specific changes are: * hwprobe support * V support (ptrace and prctl calls) * KVM support There are patches on the glibc list that introduce code which uses the hwprobe interface. Let's update the kernel headers to be ready for these changes. Signed-off-by:Christoph Müllner <christoph.muellner@vrull.eu>
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Kito Cheng authored
Inject CPU options to spike run test from elf file
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- Nov 22, 2023
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Pan Li authored
Signed-off-by:Pan Li <pan2.li@intel.com>
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- Nov 21, 2023
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Kito Cheng authored
Remove ESC char for board extra abi argument
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Pan Li authored
As we have quotes surround the argument already, it is unnecessary to ESC `;` to `\;` due to the `;` has special meanings in shell. Signed-off-by:Pan Li <pan2.li@intel.com>
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Pan Li authored
Signed-off-by:Pan Li <pan2.li@intel.com>
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Kito Cheng authored
Improve make report with extra test arguments
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Pan Li authored
* Refactor CPU options for exacting common part between qemu and spike. * Inject CPU options to spike run command line. The below common CPU options are extracted to common part. * xlen * vlen * extensions The above CPU options will be leveraged to build the run arguments for both the qemu and spike, for example. QEMU: qemu-riscv64 -cpu rv64,v=true,vlen=1024,elen=64,vext_spec=v1.0 SPIKE: spike --isa=rv64imafdcv_zicsr_zifencei_zmmul --varch=vlen:1024,elen:64 Signed-off-by:Pan Li <pan2.li@intel.com>
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- Nov 20, 2023
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Kito Cheng authored
Recently we have add the capability to adding extra compilation options for running GCC testsuite, but it seems not handle well on the `make report` part, it will ignore extra compilation options, and then...combine multiple report together. Now it will put in two different line, and the extra compilation options will listed in follwoing line, here is example output here: ========= Summary of gcc testsuite ========= | # of unexpected case / # of unique unexpected case | gcc | g++ | gfortran | rv64gc_zicfilp_zicfiss/ lp64d/ medlow |20350 / 3967 |10158 / 2583 |18374 / 3098 | rv64gc_zicfilp_zicfiss/ lp64d/ medlow | 86 / 19 | 15 / 9 | 51 / 51 | -static
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- Nov 19, 2023
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Kito Cheng authored
Extend semantic for option '--with-extra-multilib-test'
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- Nov 17, 2023
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Pan Li authored
Signed-off-by:Pan Li <pan2.li@intel.com>
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