- Apr 28, 2018
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Tim Newsome authored
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mwachs5 authored
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- Apr 25, 2018
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Megan Wachs authored
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- Apr 24, 2018
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Tim Newsome authored
Clarify triggers
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Tim Newsome authored
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Tim Newsome authored
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- Apr 19, 2018
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Tim Newsome authored
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Tim Newsome authored
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Tim Newsome authored
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- Apr 18, 2018
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Tim Newsome authored
Remove implemented features from Future Ideas.
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Tim Newsome authored
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- Apr 17, 2018
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Megan Wachs authored
NMI Clarification
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Tim Newsome authored
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- Apr 14, 2018
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Tim Newsome authored
Clarify SBA unsupport access size error.
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Megan Wachs authored
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- Apr 13, 2018
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Tim Newsome authored
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- Apr 12, 2018
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Megan Wachs authored
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Megan Wachs authored
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- Apr 11, 2018
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Tim Newsome authored
Maybe solves #252.
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Tim Newsome authored
Clarify high bits of sbdata in narrow reads.
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Tim Newsome authored
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- Mar 31, 2018
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Tim Newsome authored
Explain why progbufsize=1 is special
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- Mar 29, 2018
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Tim Newsome authored
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- Mar 28, 2018
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Tim Newsome authored
hawindowsel can be smaller, depends on # of harts
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- Mar 27, 2018
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Tim Newsome authored
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Tim Newsome authored
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- Mar 23, 2018
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Tim Newsome authored
Nonexistent/unavailable harts are not halted.
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Tim Newsome authored
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- Mar 21, 2018
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Tim Newsome authored
Clarify abstract command errors.
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Tim Newsome authored
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Megan Wachs authored
haltsum1: correct its address
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Megan Wachs authored
travis: add 'make chisel' target to regression
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- Mar 20, 2018
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Megan Wachs authored
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Megan Wachs authored
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Megan Wachs authored
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Tim Newsome authored
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Tim Newsome authored
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- Mar 17, 2018
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Tim Newsome authored
Change dcsr.prv reset value to 3
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Tim Newsome authored
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- Mar 16, 2018
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Tim Newsome authored
This will help avoid a trap where an implementation might end up with prv 0 when entering debug out of reset. Even in that case prv should be set from the privilege mode of the processor, which should be machine mode, but specifying this as the actual value makes things a little simpler.
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