- Jul 21, 2023
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S Pawan Kumar authored
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- Jul 17, 2023
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S Pawan Kumar authored
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- Jun 22, 2023
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S Pawan Kumar authored
minor fixes in checker
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- Jun 21, 2023
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
YAMLs like the custom/debug may not always be present. ensure that they're not none before they get updated into the merged dict. Signed-off-by:Karthik B K <karthik.bk@incoresemi.com>
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- May 16, 2023
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Neel Gala authored
uArch dependency support
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Neel Gala authored
Signed-off-by:Neel Gala <neelgala@incoresemi.com>
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- May 15, 2023
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Karthik B K authored
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- May 06, 2023
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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- May 05, 2023
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
all warl legality checks will now happen at once.
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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- May 04, 2023
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
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- May 03, 2023
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Karthik B K authored
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Karthik B K authored
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- Apr 26, 2023
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Neel Gala authored
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Karthik B K authored
add documentation for uArch dependency support.
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Karthik B K authored
conf.py uses the name 'RISC-V Compatibility Test Generator'. That is not the correct name of the project.
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- Apr 25, 2023
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Karthik B K authored
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Karthik B K authored
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Karthik B K authored
WARL CSRs can now include hidden uArch dependencies in their YAML definitions. the `warl_class` now creates a `uarch_depends` dict to support adding hidden uArch signals to the dependency string in a CSR's YAML definition. 1. The prefix for such a signal/group must be `uarch_`. For example - - `uarch_cachecontrol` is a valid group/signal. In order to group signals under this name, `uarch_cachecontrol::global_valid` and `uarch_cachecontrol::global_dirty` are valid dependencies. - `uarch_global_valid` and `uarch_global_dirty` are valid signals. Such signals, for parsing purposes are grouped with an implicit name `uarch_commonconfig`. This name can not be used for any other micro-architectural signal dependency. 2. Any such signals/groups will be excluded from error checks, and will evaluate to `True` for legal checks. 3. Upon encountering such a signal/group, a warning statement will be logged: [DEBUG] riscv_config.checker: -- Checking reset values for csr: mtvec::base [WARNING] riscv_config.warl: WARL for csr mtvec::base depends on uarch csr uarch_global_valid. Treating this as a uarch dependency and excluding from all furtherchecks. [DEBUG] riscv_config.warl: uArch dependencies are: {'uarch_commonconfig':['uarch_global_valid']} [WARNING] riscv_config.warl: WARL for csr mtvec::base depends on uarch csr uarch_global_dirty. Treating this as a uarch dependency and excluding from all further checks. [DEBUG] riscv_config.warl: uArch dependencies are: {'uarch_commonconfig': ['uarch_global_valid', 'uarch_global_dirty']} [DEBUG] riscv_config.warl: ---- WARL Value Legality Check: value:0 csr:mtvec::base dependency_vals:None [WARNING] riscv_config.warl: csr/subfield uarch_global_valid is a uArch dependency. [WARNING] riscv_config.warl: csr/subfield uarch_global_dirty is a uArch dependency. [DEBUG] riscv_config.warl: warl legal string "uarch_global_valid[3:0] in [0] and uarch_global_dirty[3:0] in [0] -> base[61:0] bitmask [0x3FFFFFFFFFFFFFFF, 0x0000000000000000]" treats the input value 0 as legal 4. Such signals will show up in the checked YAMLs as follows: if grouped -- warl: dependency_fields: [uarch_cachecontrol::global_valid, uarch_cachecontrol::global_dirty] legal: - global_valid[3:0] in [0] and global_dirty[3:0] in [0] -> base[61:0] bitmask [0x3FFFFFFFFFFFFFFF, 0x0000000000000000] wr_illegal: - Unchanged or if not grouped -- warl: dependency_fields: [uarch_global_valid, uarch_global_dirty] legal: - uarch_global_valid[3:0] in [0] and uarch_global_dirty[3:0] in [0] -> base[61:0] bitmask [0x3FFFFFFFFFFFFFFF, 0x0000000000000000] wr_illegal: - Unchanged Signed-off-by:Karthik B K <karthik.bk@incoresemi.com>
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Neel Gala authored
fix mnstatus address to 0x744
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