Revert "Revert "SBI emulation of reads and writes to perf counters and config (#98)""

This reverts commit 7ae86fb9.

This will continue to allow accesses to cycle/time via mcycle/mtime
despite https://github.com/riscv-software-src/riscv-isa-sim/pull/1297.
The hope is this will keep most people happy while doing the right thing
with Spike.