- Jun 30, 2023
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Knute Lingaard authored
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Knute Lingaard authored
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Knute Lingaard authored
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Knute Lingaard authored
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Knute Lingaard authored
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Knute Lingaard authored
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Aaron Chan authored
Changing ExecutePipe.cpp code to set scoreboard based on destination register, not the pipe register. Added associated test for checking correct register file's rename registers are used.
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- Jun 29, 2023
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Knute Lingaard authored
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Knute Lingaard authored
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- Jun 15, 2023
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Aaron Chan authored
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- Jun 14, 2023
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Aaron Chan authored
Summary of Changes: LSU.cpp -> Operand dependency checking based on source bits in scoreboard, callbacks ExecutePipe.cpp -> Operand dependency checking based on source bits in scoreboard, callbacks Rename_test.cpp -> Added testing for both LSU and ExecutePipe with RAW instruction jsons, imported OlympiaSim for full simulation run to access data Final portion of operand dependency checking implemented in this PR for LSU and ExecutePipe. --------- Signed-off-by:
Aaron Chan <achn357@gmail.com> Co-authored-by:
Knute Lingaard <knute.lingaard@sifive.com>
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- May 21, 2023
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Knute authored
Signed-off-by:Knute <56927209+klingaard@users.noreply.github.com>
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- May 20, 2023
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Aaron Chan authored
Implementation of Task 1 for full Rename support: Task 1: Add a arch map -> PRF map to Rename. This includes adding a physical register freelist (parameterized to the number). When an instruction enters rename, its source arch registers are mapped to the current physical register for that arch value. Then its destination registers are renamed — a new PRF is pulled from the freelist, given to the instruction (via the scoreboard mask) and the rename map updated. --------- Signed-off-by:
Aaron Chan <achn357@gmail.com> Co-authored-by:
Aaron Chan <aaronchan@client-10-229-46-41.tamulink.tamu.edu> Co-authored-by:
Aaron Chan <aaronchan@Aarons-MacBook-Air-2.local> Co-authored-by:
Knute Lingaard <knute.lingaard@sifive.com> Co-authored-by:
Aaron Chan <aaronchan@Aarons-Air-2.attlocal.net> Co-authored-by:
Aaron Chan <aaronchan@client-10-228-106-204.tamulink.tamu.edu>
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- May 12, 2023
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Suraj Shirvankar authored
Signed-off-by:Suraj Shirvankar <surajshirvankar@gmail.com>
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Suraj Shirvankar authored
Signed-off-by:Suraj Shirvankar <surajshirvankar@gmail.com>
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- May 08, 2023
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Peter Debacker authored
This fixes #35 and tracks the changes in Sparta [PR397(https://github.com/sparcians/map/pull/397 ), which are merges into Sparta main already. --------- Signed-off-by:
Peter Debacker <peter-d@users.noreply.github.com> Signed-off-by:
Knute Lingaard <knute.lingaard@sifive.com> Co-authored-by:
Peter Debacker <pdback@imec.be> Co-authored-by:
Knute Lingaard <Knute.Lingaard@sifive.com> Co-authored-by:
Knute Lingaard <klingaard@gmail.com>
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- Apr 21, 2023
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Suraj Shirvankar authored
Small to change to use all the CPU cores for the build. Signed-off-by:Suraj Shirvankar <surajshirvankar@gmail.com>
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- Mar 22, 2023
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Knute Lingaard authored
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- Mar 14, 2023
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Knute Lingaard authored
Added directions to checkout map_v1.1.0 Signed-off-by:Knute Lingaard <knute.lingaard@sifive.com>
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Lu_Reaper authored
the path of WeightedContextCounter has been changed to sparta/statistics, so fix it in this PR
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- Feb 22, 2023
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Knute Lingaard authored
First commit of using GitHub actions Signed-off-by:
Knute Lingaard <knute.lingaard@sifive.com> --------- Signed-off-by:
Knute Lingaard <knute.lingaard@sifive.com> Co-authored-by:
bdutro <brett.dutro@gmail.com>
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- Feb 11, 2023
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arupc-vmicro authored
Added specification for conda environment which can be used to build olympia, stf lib/tools
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- Feb 03, 2023
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arupc-vmicro authored
- unmodified patch for dromajo, when applied, did not compile for me. Added a missing header file.
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- Jan 14, 2023
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Knute Lingaard authored
Added link to instructions to install required STF library packages Signed-off-by:Knute Lingaard <knute.lingaard@sifive.com>
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- Dec 16, 2022
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Knute authored
Signed-off-by:Knute <56927209+klingaard@users.noreply.github.com>
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- Dec 09, 2022
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Knute Lingaard authored
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- Dec 07, 2022
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Knute Lingaard authored
Signed-off-by:Knute Lingaard <knute.lingaard@sifive.com>
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arupc-vmicro authored
Adding a cast to get past the conversion error encountered during build.
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arupc-vmicro authored
Added a few additional LSU statistics. Output from running dhrystone trace: ``` top.cpu.core0.lsu lsu_insts_dispatched = 5850001 stores_retired = 5850001 lsu_insts_issued = 11700073 lsu_insts_completed = 5849999 lsu_flushes = 0 tlb_hits = 5850001 tlb_misses = 16 dl1_cache_hits = 5850000 dl1_cache_misses = 55 biu_reqs = 19 top.cpu.core0.lsu.tlb tlb_hits = 5850001 ``` I will further look into the stats to make sure that they make sense. But the added stats can now be used for the purpose of the demo.
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- Dec 01, 2022
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Zhen Wei authored
The next step is adding rename function to let instructions fly via Scoreboard
🙂
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- Nov 30, 2022
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Knute Lingaard authored
Couple of issues fixed and cleaned up: - Logger cleanup - Fetch credit bug fix (fixes #23) - Logger pure virtual call in Retire -- deleted inst pointer before done with it! - Added `isDone` to stop fetching when the trace is finished
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- Nov 28, 2022
- Nov 27, 2022
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Knute Lingaard authored
In this PR, Execute is now it's own node and dynamically creates execution pipes based on extensions listed in the config files: ``` top.cpu.core0.extension.core_extensions: execution_topology: [["alu", "6"], ["fpu", "2"], ["br", "2"]] ``` Work done; - Added new class `Dispatcher` that is dynamically created by `Dispatch` for each execution pipe defined in the `execution_topology` extension - Added new class `Execute` that is a node created for the sole purpose of dynamically creating the `ExecutePipe` objects based on the `execution_topology` extension - Cleaned up old code - Reduced the `CPUTopology` structure to just static components like Fetch, Decode, Rename, Dispatch, Execute, LS/etc, and Retire - Updated the arches to include a small, medium, and big core. Dhrystone trace improves with each architecture, but is limited by LS. Signed-off-by:
Knute Lingaard <knute.lingaard@sifive.com> Co-authored-by:
Zhen Wei <zhen.wei@sifive.com>
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- Nov 26, 2022
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Knute Lingaard authored
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- Nov 25, 2022
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Knute Lingaard authored
To facilitate dynamic execution topologies (what that means: being able to add/subtract ALUs, branch units, FP units, etc), a Dispatch tester is in order to ensure it's working properly. This PR adds: 1. A Dispatch tester class 2. Generic Source/Sink classes for instruction groups or single instruction 3. A more structured build environment 4. First cut of topology yaml files + core extensions
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- Oct 12, 2022
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Knute authored
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- Oct 11, 2022
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avinash mehta authored
Fix typo Signed-off-by:avinash mehta <avinash.mehta@imgtec.com>
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- Oct 08, 2022
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Knute Lingaard authored
Fixed issues found during demo
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- Sep 30, 2022
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Knute authored
Thanks, Pete! Signed-off-by:Knute <56927209+klingaard@users.noreply.github.com>
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